Article

Scratch-pad memory allocation without compiler support for java applications

Authors:

Angel Dominguez,

Rajeev BaruaAuthors Info & Claims

CASES '07: Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems

Pages 85 - 94

https://doi.org/10.1145/1289881.1289899

Published: 30 September 2007 Publication History

Abstract

This paper presents the first scratch-pad memory allocation scheme that requires no compiler support for interpreted-language based applications. A scratch-pad memory(SPM) is a fast compiler-managed SRAM that replaces the hardware-managed cache. Its uses are motivated by its better realtime guarantees as compared to cache and by its significantly lower overheads in energy consumption, area and access time. Interpreted languages are languages such as Java that are interpreted by a runtime environment instead of being executed directly on hardware.

All existing memory allocation schemes for SPM require compiler analysis to develop the allocation strategy. Specifically, existing allocation schemes for Java-based applications determine the allocations at compile-time. They then annotate the Java bytecodes with these allocation decisions for the Java Virtual Machine (JVM) to implement the actual allocation at runtime. These existing allocation schemes tie the resulting bytecode to specific SPM sizes, therefore preventing the applications from being portable to different SPM sizes. Further, existing methods do not work for unmodified third-party byte codes produced by compilers other than their specialized compilers.

In this paper, we propose the first ever SPM allocation schemethat is completely implemented inside the JVM. Our method requires no compiler support and works for unmodified byte codes from any source. Moreover, unlike existing methods, it preserves the portability of bytecode to any SPM size. We investigate our method on the Sun Hotspot JVM on which we achieve a 27.8% improvement on runtime and 21.8% on energy saving versus not using the SPM - the only existing alternative for unmodified bytecodes.

References

[1]

aiT: Worst Case Execution Time Analyzers. AbsInt Angewandte Informatik GmbH. 2004. http://www.absint.com/ait.

[2]

F. Angiolini, F. Menichelli, A. Ferrero, L. Benini, and M. Olivieri. A post-compiler approach to scratchpad mapping of code. In Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems, pages 259--267. ACM Press, 2004.

Digital Library

[3]

ARM968E-S 32-bit Embedded Core. Arm, Revised March 2004. http://www.arm.com/products/CPUs/ARM968E-S.html.

[4]

O. Avissar, R. Barua, and D. Stewart. Heterogeneous Memory Management for Embedded Systems. In Proceedings of the ACM 2nd International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), November 2001. Also at http://www.ece.umd.edu/<barua.

Digital Library

[5]

O. Avissar, R. Barua, and D. Stewart. An Optimal Memory Allocation Scheme for Scratch-Pad Based Embedded Systems. ACM Transactions on Embedded Systems (TECS), 1(1), September 2002.

Digital Library

[6]

R. Banakar, S. Steinke, B.-S. Lee, M. Balakrishnan, and P. Marwedel. Scratchpad Memory: A Design Alternative for Cache On-chip memory in Embedded Systems. In Tenth International Symposium on Hardware/Software Codesign (CODES), Estes Park, Colorado, May 6-8 2002. ACM.

Digital Library

[7]

M. BOHR, B. Doyle, J. Kavalieros, D. Barlage, A. Murthy, M. Doczy, R. Rios, T. Linton, R. Arghavani, B. Jin, S. Datta, and S. Hareland. Intelt's 90 nm technology: Mooret's law and more, September 2002. Document Number: {IR-TR-2002-10}.

[8]

A. Dominguez, S. Udayakumaran, and R. Barua. Heap Data Allocation to Scratch-Pad Memory in Embedded Systems. In Journal of Embedded Computing(JEC), 1(4), 2005. IOS Press, Amsterdam, Netherlands.

Digital Library

[9]

J. Edler and M. Hill. Dineroiv cache simulator. Revised 2004. http://www.cs.wisc.edu/ markhill/DineroIV/.

[10]

Intel wireless flash memory (W30). Intel Corporation. http://www.intel.com/design/flcomp/datashts/290702.htm.

[11]

GetJar. Java nokia series 60 software. http://www.getjar.com/software/Java/Nokia_Series_60.

[12]

Google. Google mobile gmail. http://www.google.com/mobile/mail/index.html.

[13]

G. Hallnor and S. K. Reinhardt. A fully associative software-managed cache design. In Proc. of the 27th Int'l Symp. on Computer Architecture (ISCA), Vancouver, British Columbia, Canada, June 2000.

Digital Library

[14]

Handango. Java application for cell phone. http://www.handango.com/.

[15]

J. Hennessy and D. Patterson. Computer Architecture A Quantitative Approach. Morgan Kaufmann, Palo Alto, CA, second edition, 1996.

Digital Library

[16]

J. D. Hiser and J. W. Davidson. Embarc: an efficient memory bank assignment algorithm for retargetable compilers. In Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems, pages 182--191. ACM Press, 2004.

Digital Library

[17]

C. Huneycutt and K. Mackenzie. Software caching using dynamic binary rewriting for embedded devices. In Proceedings of the International Conference on Parallel Processing, pages 621--630, 2002.

Digital Library

[18]

S. M. Inc. Java SE HotSpot at a Glance. http://java. sun.com/javase/technologies/hotspot/.

[19]

Informit. Java on pocket pc devices. http://www.informit.com/articles/article.asp?=344816&rl=1.

[20]

J. Janzen. Calculating Memory System Power for DDR SDRAM. In DesignLine Journal, volume 10(2). Micron Technology Inc., 2001. http://www.micron.com/publications/designline.html.

[21]

J. P. Lewis and U. Neumann. Performance of Java versus C++. Computer Graphics and Immersive Technology Lab, University of Southern California, Jan 2003. Updated 2004. http://www.idiom.com/~zilla/Computer/javaCbenchmark.html.

[22]

S. Kim, S. Tomar, N. Vijaykrishnan, M. Kandemir, and M. Irwin. Energy-efficient java execution using local memory and object co-location. In Proceedings of Computers and Digital Techniques, pages 33--42. IEEE, 2004.

[23]

C. Lebsack and J. Chang. Using scratchpad to exploit object locality in java. In Proceedings of the International Conference on Computer Design: VLSI in Computers & Processors (ICCD), pages 381-- 386. IEEE, 2005.

Digital Library

[24]

T. Lindholm and F. Yellin. The Java Virtual Machine Specification. 1999. http://java.sun.com/docs/books/vmspec/2nd-edition/html/VMSpecTOC.doc.html.

Digital Library

[25]

S. Microsystems. Java se embedded overview. http://java.sun.com/javase/embedded/overview.jsp.

[26]

M. Kandemir, J. Ramanujam, M. J. Irwin, N. Vijaykrishnan, I. Kadayif, and A. Parikh. Dynamic Management of Scratch-Pad Memory Space. In Design Automation Conference, pages 690--695, 2001.

Digital Library

[27]

C. A. Moritz, M. Frank, and S. Amarasinghe. FlexCache: A Framework for Flexible Compiler Generated Data Caching. In The 2nd Workshop on Intelligent Memory Systems, Boston, MA, November 12 2000.

Digital Library

[28]

N. Nguyen, A. Dominguez, and R. Barua. Memory allocation for embedded systems with a compile-time-unknown scratch-pad size. To appear in the ACM Transactions on Embedded Computing Systems (TECS), 2007. http://www.ece.umd.edu/~barua/nguyen-TECS-2007.pdf.

[29]

P. R. Panda, N. D. Dutt, and A. Nicolau. On-Chip vs. Off-Chip Memory: The Data Partitioning Problem in Embedded Processor-Based Systems. ACM Transactions on Design Automation of Electronic Systems, 5(3), July 2000.

Digital Library

[30]

Compilation Challenges for Network Processors. Industrial Panel, ACM Conference on Languages, Compilers and Tools for Embedded Systems (LCTES), June 2003. Slides at http://www.cs.purdue.edu/s3/LCTES03/.

[31]

P. Shivakumar and N. Jouppi. Cacti 3.2. Revised 2004. http://research.compaq.com/wrl/people/jouppi/CACTI.html.

[32]

J. Sjodin, B. Froderberg, and T. Lindgren. Allocation of Global Data Objects in On-Chip RAM. Compiler and Architecture Support for Embedded Computing Systems, December 1998.

[33]

J. Sjodin and C. V. Platen. Storage Allocation for Embedded Processors. Compiler and Architecture Support for Embedded Computing Systems, November 2001.

Digital Library

[34]

S. Steinke, N. Grunwal, L. Wehmeyer, R. Banakar, M. Balakrishnan, and P. Marwedel. Reducing energy consumption by dynamic copying of instructions onto onchip memory. In Proceedings of the 15th International Symposium on System Synthesis (ISSS) (Kyoto, Japan). ACM, 2002.

Digital Library

[35]

S. Steinke, L. Wehmeyer, B. Lee, and P. Marwedel. Assigning program and data objects to scratchpad for energy reduction. In Proceedings of the conference on Design, automation and test in Europe, page 409. IEEE Computer Society, 2002.

Digital Library

[36]

S. Tomar, S. Kim, N. Vijaykrishnan, M. Kandemir, and M. J. Irwin. Use of local memory for efficient java execution. In Proceedings of the International Conference on Computer Design: VLSI in Computers & Processors (ICCD). IEEE, 2001.

Digital Library

[37]

TuxMobil. Free java applications for (linux) pdas and mobile cell phones. http://tuxmobil.org/pda_linux_apps_java.html.

[38]

S. Udayakumaran and R. Barua. Compiler-decided dynamic memory allocation for scratch-pad based embedded systems. In Proceedings of the international conference on Compilers, architectures and synthesis for embedded systems (CASES), pages 276--286. ACM Press, 2003.

Digital Library

[39]

S. Udayakumaran, A. Dominguez, and R. Barua. Dynamic Allocation for Scratch-Pad Memory using Compile-Time Decisions. To appear in the ACM Transactions on Embedded Computing Systems (TECS), 5(2), 2006. http://www.ece.umd.edu/~barua/udayakumaran-TECS-2006.pdf.

Digital Library

[40]

M. Verma, L. Wehmeyer, and P. Marwedel. Cache-aware scratchpad allocation algorithm. In Proceedings of the conference on Design, automation and test in Europe, page 21264. IEEE Computer Society, 2004.

Digital Library

[41]

M. Verma, L. Wehmeyer, and P. Marwedel. Dynamic overlay of scratchpad memory for energy minimization. In International conference on Hardware/Software Codesign and System Synthesis(CODES+ISSS). ACM, 2004.

Digital Library

[42]

L. Wehmeyer, U. Helmig, and P. Marwedel. Compiler-optimized usage of partitioned memories. In Proceedings of the 3rd Workshop on Memory Performance Issues (WMPI2004), 2004.

Digital Library

[43]

L. Wehmeyer and P. Marwedel. Influence of onchip scratchpad memories on wcet prediction. In Proceedings of the 4th International Workshop on Worst-Case Execution Time (WCET) Analysis, 2004.

[44]

L. Wehmeyer and P. Marwedel. Influence of memory hierarchies on predictability for time constrained embedded software. In DATE '05: Proceedings of the conference on Design, Automation and Test in Europe, pages 600--605, Washington, DC, USA, 2005. IEEE Computer Society.

Digital Library

[45]

S. Wilton and N. Jouppi. Cacti: An enhanced cache access and cycle time model. In IEEE Journal of Solid-State Circuits, 1996.

Cited By

Huangfu YZhang W(2014)A Real-Time Instruction Cache with High Average-Case PerformanceProceedings of the 2014 IEEE 17th International Symposium on Object/Component-Oriented Real-Time Distributed Computing10.1109/ISORC.2014.59(109-116)Online publication date: 10-Jun-2014
https://dl.acm.org/doi/10.1109/ISORC.2014.59
Zhang WWu L(2014)Exploiting Hybrid SPM-Cache Architectures to Reduce Energy Consumption for Embedded ComputingProceedings of the 2014 IEEE Intl Conf on High Performance Computing and Communications, 2014 IEEE 6th Intl Symp on Cyberspace Safety and Security, 2014 IEEE 11th Intl Conf on Embedded Software and Syst (HPCC,CSS,ICESS)10.1109/HPCC.2014.59(340-347)Online publication date: 20-Aug-2014
https://dl.acm.org/doi/10.1109/HPCC.2014.59
Wu LDing YZhang W(2014)Characterizing Energy Consumption of Real-Time and Media Benchmarks on Hybrid SPM-CachesProceedings of the 2014 IEEE Intl Conf on High Performance Computing and Communications, 2014 IEEE 6th Intl Symp on Cyberspace Safety and Security, 2014 IEEE 11th Intl Conf on Embedded Software and Syst (HPCC,CSS,ICESS)10.1109/HPCC.2014.100(526-533)Online publication date: 20-Aug-2014
https://dl.acm.org/doi/10.1109/HPCC.2014.100
Show More Cited By

Index Terms

Scratch-pad memory allocation without compiler support for java applications

Recommendations

Compiler-decided dynamic memory allocation for scratch-pad based embedded systems
CASES '03: Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems

This paper presents a highly predictable, low overhead and yet dynamic, memory allocation strategy for embedded systems with scratch-pad memory. A scratch-pad is a fast compiler-managed SRAM memory that replaces the hardware-managed cache. It is ...
Dynamic allocation for scratch-pad memory using compile-time decisions

In this research, we propose a highly predictable, low overhead, and, yet, dynamic, memory-allocation strategy for embedded systems with scratch pad memory. A scratch pad is a fast compiler-managed SRAM memory that replaces the hardware-managed cache. ...
Memory allocation for embedded systems with a compile-time-unknown scratch-pad size
CASES '05: Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems

This paper presents the first memory allocation scheme for embedded systems having scratch-pad memory whose size is unknown at compile time. A scratch-pad memory (SPM) is a fast compiler-managed SRAM that replaces the hardware-managed cache. Its uses ...

Comments

Information & Contributors

Information

Published In

cover image ACM Conferences

CASES '07: Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems

September 2007

292 pages

ISBN:9781595938268

DOI:10.1145/1289881

General Chairs:
Taewhan Kim
Seoul National University, South Korea
,
Pascal Sainrat
IRIT - Université de Toulouse, France
,
Program Chairs:
Steven S. Lumetta
University of Illinois at Urbana-Champaign, USA
,
Nacho Navarro
Universitat Politecnica de Catalunya, Spain

Copyright © 2007 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 30 September 2007

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Article

Conference

ESWEEK07

Sponsor:

ESWEEK07: Third Embedded Systems Week

September 30 - October 3, 2007

Salzburg, Austria

Acceptance Rates

Overall Acceptance Rate 52 of 230 submissions, 23%

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

11
Total Citations
View Citations
404
Total Downloads

Downloads (Last 12 months)2
Downloads (Last 6 weeks)1

Reflects downloads up to 06 Oct 2024

Other Metrics

View Author Metrics

Citations

Cited By

Huangfu YZhang W(2014)A Real-Time Instruction Cache with High Average-Case PerformanceProceedings of the 2014 IEEE 17th International Symposium on Object/Component-Oriented Real-Time Distributed Computing10.1109/ISORC.2014.59(109-116)Online publication date: 10-Jun-2014
https://dl.acm.org/doi/10.1109/ISORC.2014.59
Zhang WWu L(2014)Exploiting Hybrid SPM-Cache Architectures to Reduce Energy Consumption for Embedded ComputingProceedings of the 2014 IEEE Intl Conf on High Performance Computing and Communications, 2014 IEEE 6th Intl Symp on Cyberspace Safety and Security, 2014 IEEE 11th Intl Conf on Embedded Software and Syst (HPCC,CSS,ICESS)10.1109/HPCC.2014.59(340-347)Online publication date: 20-Aug-2014
https://dl.acm.org/doi/10.1109/HPCC.2014.59
Wu LDing YZhang W(2014)Characterizing Energy Consumption of Real-Time and Media Benchmarks on Hybrid SPM-CachesProceedings of the 2014 IEEE Intl Conf on High Performance Computing and Communications, 2014 IEEE 6th Intl Symp on Cyberspace Safety and Security, 2014 IEEE 11th Intl Conf on Embedded Software and Syst (HPCC,CSS,ICESS)10.1109/HPCC.2014.100(526-533)Online publication date: 20-Aug-2014
https://dl.acm.org/doi/10.1109/HPCC.2014.100
Wu LZhang W(2013)Reducing worst-case execution time of hybrid SPM-caches2013 IEEE 32nd International Performance Computing and Communications Conference (IPCCC)10.1109/PCCC.2013.6742770(1-9)Online publication date: Dec-2013
https://doi.org/10.1109/PCCC.2013.6742770
Karthika MRajasekaran C(2012)Scratchpad memory-global power optimizationInternational Conference on Pattern Recognition, Informatics and Medical Engineering (PRIME-2012)10.1109/ICPRIME.2012.6208343(199-203)Online publication date: Mar-2012
https://doi.org/10.1109/ICPRIME.2012.6208343
Swaminathan KPisolkar RCong Xu Narayanan V(2012)When to forget: A system-level perspective on STT-RAMs17th Asia and South Pacific Design Automation Conference10.1109/ASPDAC.2012.6164965(311-316)Online publication date: Jan-2012
https://doi.org/10.1109/ASPDAC.2012.6164965
Velasco JAtienza DOlcoz K(2012)Memory power optimization of Java-based embedded systems exploiting garbage collection informationJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2011.11.00258:2(61-72)Online publication date: 1-Feb-2012
https://dl.acm.org/doi/10.1016/j.sysarc.2011.11.002
Hong DBathen LLim SDutt N(2011)DynaPoMPProceedings of the Workshop on Embedded Systems Security10.1145/2072274.2072279(1-10)Online publication date: 9-Oct-2011
https://dl.acm.org/doi/10.1145/2072274.2072279
Velasco JAtienza DOlcoz KLombardi FBhanja SMassoud YBahar R(2009)Exploration of memory hierarchy configurations for efficient garbage collection on high-performance embedded systemsProceedings of the 19th ACM Great Lakes symposium on VLSI10.1145/1531542.1531549(3-8)Online publication date: 10-May-2009
https://dl.acm.org/doi/10.1145/1531542.1531549
Yemliha TSrikantaiah SKandemir MOzturk ONassif SRoychowdhury J(2008)SPM management using Markov chain based data access predictionProceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design10.5555/1509456.1509582(565-569)Online publication date: 10-Nov-2008
https://dl.acm.org/doi/10.5555/1509456.1509582
Show More Cited By

View Options

Get Access

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Media

Figures

Other

Tables

View Table of Contents