Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
skip to main content
10.1145/1450058.1450064acmconferencesArticle/Chapter ViewAbstractPublication PagesesweekConference Proceedingsconference-collections
research-article

A PRAM and NAND flash hybrid architecture for high-performance embedded storage subsystems

Published: 19 October 2008 Publication History

Abstract

NAND flash-based storage is widely used in embedded systems due to its numerous benefits: low cost, high density, small form factor and so on. However, NAND flash-based storage is still suffering from serious performance degradation for random or small size write access. This degradation mainly comes from the physical constraints of NAND flash: erase-before-program and different unit size of erase and program operations. To overcome these constraints, we propose to use PRAM (Phase-change RAM) which supports advanced features: fast byte access capability and no requirement for erase-before-program.
In this paper, we focus on developing a high-performance NAND flash-based storage system by maximally exploiting the advanced feature of PRAM, in terms of performance and wearing out. To do this, we first propose a new hybrid storage architecture which consists of PRAM and NAND flash. Second, we devise two novel software schemes for the proposed hybrid storage architecture; FSMS (File System Metadata Separation) and hFTL (hybrid Flash Translation Layer). Finally, we demonstrate that our hybrid architecture increases the performance up to 290% and doubles the lifespan compared to the existing NAND flash only storage systems.

References

[1]
R. Bez, E. Camerlenghi, A. Modelli and A. Visconti, 2003. Introduction to Flash Memory, Proceeding of the IEEE, Vol 91, No 4, 2003
[2]
G. H. Koh and et el., 2004. PRAM Process Technology. Proceeding of the IEEE International Conference on Integrated Circuit Design and Technology, 2004.
[3]
Kinam Kim and G. H. Koh, 2004. Future Memory Technology including Emerging New Memories. Proceedings of 24th International Conference on Microelectronics, NIS, Serbia and Montenegro, May, 2004.
[4]
Mun-Kyu Choi and et el., 2002. A 0.25um 3.0V 1T1C 32Mb Nonvolatile Ferroelectric RAM with Address Transition Detector and Current Forcing Latch Sense Amplifier Scheme. IEEE Journal of Solid-State Circuits 37, 2002.
[5]
J. Kim, J. M. Kim, S. Noh, S. L. Min, and Y.Cho, 2007. A space-efficient flash translation layer for CompactFlash systems, IEEE Transactions on Consumer Electronics, 48(2), pp. 366--375 (2002).
[6]
Mark DeVoss, 2007. The Winds of Phase Change are Blowing. Market Brief, iSuppli, May 2007.
[7]
Ethan L. Miller, Scott A. Brandt and Darrell D. E. Long, 2001. HeRMES: High-Performance Reliable MRAM-Enabled Storage. in Proceedings of 8th IEEE Workshop on Hot Topics in Operating Systems (HotOS-VIII), Schloss Elmau, Germany, pp. 83--87, May (2001).
[8]
Nathan K. Edel, Ethan L. Miller, Karl S. Brandt and Scott A. Brandt, 2004. Measuring the Compressibility of Metadata and Small Files for Disk/NVRAM Hybrid Storage Systems. in Proceedings of the International Symposium on Performance Evaluation of Computer and Telecommunication Systems(SPECTS'04), San Jose, CA, July (2004).
[9]
An-I A. Wang and et el., 2002. Conquest: Better Performance Through A Disk/Persistent-RAM Hybrid File System. in proceedings of the 2002 USENIX Annual Technical Conference, Monterey, June, 2002.
[10]
S. Lee, and et el., 2007. A Log Buffer-Based Flash Translation Layer Using Fully-Associative Sector Translation. ACM Transactions on Embedded Computing Systems, Vol. 6, No 3, July 2007.
[11]
J.U. Kang, H. Jo, J.S. Kim and J.W. Lee, 2006. A Superblock-based Flash Translation Layer for NAND Flash Memory. EMSOFT'06, Seoul Korea, October, 2006.
[12]
Chin-Hsien Wu and Tei-Wei Kuo, 2006. An Adaptive Two-Level Management for the Flash Translation Layer in Embedded Systems. International Conference on Computer Aided Design (ICCAD'06), San Jose CA, November 2006.
[13]
D. Roselli, J. Lorch, and T. Anderson, 2000. A Comparison of File System Workloads. USENIX Technical Conference, 2000.
[14]
Intel Corporation, 1998. Understanding the flash translation layer (FTL) specification. http://developer.intel.com, 1998.
[15]
A. Ban. Flash file system. United States Patent, No. 5,404,485, April (1995).
[16]
C. Association, http://www.compactflash.org.
[17]
EETIMES, Samsung introduces working prototype of PRAM http://www.eetimes.com (2006/9/11).
[18]
IOZone benchmark, http://www.iozone.org.
[19]
A. Birrel, M. Isard, C. Thancker, and T. Wobber, 2007. A design for High-Performance Flash Disks. ACM SIGOPS Operating Systems Review, Vol. 41(2), April 2007.
[20]
Threaded I/O benchmark, http://sourceforge.net/projects/tiobench
[21]
Samsung Electronics, Datasheet K9G8G08UOM, 2006.
[22]
Samsung Electronics, Datasheet KPS1215EZM, 2006.

Cited By

View all
  • (2021)Bridging Mismatched Granularity Between Embedded File Systems and Flash MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.303681440:10(2024-2035)Online publication date: Oct-2021
  • (2021)Exploring Skyrmion Racetrack Memory for High Performance Full-Nonvolatile FTL2021 IEEE 10th Non-Volatile Memory Systems and Applications Symposium (NVMSA)10.1109/NVMSA53655.2021.9628788(1-6)Online publication date: 18-Aug-2021
  • (2020)DSFTL: An Efficient FTL for Flash Memory Based Storage SystemsElectronics10.3390/electronics90101459:1(145)Online publication date: 12-Jan-2020
  • Show More Cited By

Index Terms

  1. A PRAM and NAND flash hybrid architecture for high-performance embedded storage subsystems

    Recommendations

    Comments

    Information & Contributors

    Information

    Published In

    cover image ACM Conferences
    EMSOFT '08: Proceedings of the 8th ACM international conference on Embedded software
    October 2008
    284 pages
    ISBN:9781605584683
    DOI:10.1145/1450058
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

    Sponsors

    Publisher

    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 19 October 2008

    Permissions

    Request permissions for this article.

    Check for updates

    Author Tags

    1. file system
    2. flash translation layer (ftl)
    3. nand flash
    4. pram

    Qualifiers

    • Research-article

    Conference

    ESWEEK 08
    ESWEEK 08: Fourth Embedded Systems Week
    October 19 - 24, 2008
    GA, Atlanta, USA

    Acceptance Rates

    Overall Acceptance Rate 60 of 203 submissions, 30%

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • Downloads (Last 12 months)22
    • Downloads (Last 6 weeks)1
    Reflects downloads up to 09 Feb 2025

    Other Metrics

    Citations

    Cited By

    View all
    • (2021)Bridging Mismatched Granularity Between Embedded File Systems and Flash MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.303681440:10(2024-2035)Online publication date: Oct-2021
    • (2021)Exploring Skyrmion Racetrack Memory for High Performance Full-Nonvolatile FTL2021 IEEE 10th Non-Volatile Memory Systems and Applications Symposium (NVMSA)10.1109/NVMSA53655.2021.9628788(1-6)Online publication date: 18-Aug-2021
    • (2020)DSFTL: An Efficient FTL for Flash Memory Based Storage SystemsElectronics10.3390/electronics90101459:1(145)Online publication date: 12-Jan-2020
    • (2020)NS-FTL: Alleviating the Uneven Bit-Level Wearing of NVRAM-based FTL via NAND-SPIN2020 9th Non-Volatile Memory Systems and Applications Symposium (NVMSA)10.1109/NVMSA51238.2020.9188172(1-6)Online publication date: Aug-2020
    • (2020)Managing Massive Amounts of Small Files in All-Flash Storage2020 IEEE 44th Annual Computers, Software, and Applications Conference (COMPSAC)10.1109/COMPSAC48688.2020.0-217(386-393)Online publication date: Jul-2020
    • (2020)A Novel Modeling Method of NAND DeviceAdvanced Intelligent Systems for Sustainable Development (AI2SD’2019)10.1007/978-3-030-36671-1_5(51-61)Online publication date: 4-Mar-2020
    • (2019)Hotness-aware page partition management methodNeural Computing and Applications10.1007/s00521-018-3668-x31:1(133-146)Online publication date: 1-Jan-2019
    • (2018)A Write-Friendly and Cache-Optimized Hashing Scheme for Non-Volatile Memory SystemsIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2017.278225129:5(985-998)Online publication date: 1-May-2018
    • (2018)Content Popularity-Based Selective Replication for Read Redirection in SSDs2018 IEEE 26th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS)10.1109/MASCOTS.2018.00009(1-15)Online publication date: Sep-2018
    • (2017)Mobile Unified Memory-Storage Structure Based on Hybrid Non-Volatile MemoriesACM Journal on Emerging Technologies in Computing Systems10.1145/300765013:3(1-18)Online publication date: 21-Apr-2017
    • Show More Cited By

    View Options

    Login options

    View options

    PDF

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader

    Figures

    Tables

    Media

    Share

    Share

    Share this Publication link

    Share on social media