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Simulating and compiling a hypothetical microprogrammed architecture with projects for computer architecture and compiler design

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Seth D. BergmannAuthors Info & Claims

ACM SIGCSE Bulletin, Volume 25, Issue 2

Pages 38 - 42

https://doi.org/10.1145/152751.152761

Published: 01 June 1993 Publication History

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References

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S. D. Bergmann 1993, Compiler Design for Undergraduates, to be published by Wm. C. Brown.

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D. Foley 1992, "Microcode Simulation in the Computer Architecture Course," SIGCSE Bulletin, vol. 24, no. 3.

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J. Harris 1988, "A Microprogrammable Project for a Course in Computer Systems," SIGCSE Bulletin, vol. 20, no. 2.

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F. L. Moore 1983, "Teaching Microcoding Principles," SIGCSE Bulletin, vol. 15, no. 1.

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Mendes JPanicker R(2024)RISCALAR: A Cycle-Approximate, Parametrisable RISC-V Microarchitecture Explorer & Simulator2024 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS58744.2024.10558557(1-5)Online publication date: 19-May-2024
https://doi.org/10.1109/ISCAS58744.2024.10558557
Nordström M(2011)Educators' strategies for object-oriented analysis and designACM Inroads10.1145/2038876.20388922:4(50-58)Online publication date: 1-Dec-2011
https://dl.acm.org/doi/10.1145/2038876.2038892
Zhang WLim JOlichandran RScherpelz JJin GLu SReps T(2011)ConSeqACM SIGPLAN Notices10.1145/1961296.195039546:3(251-264)Online publication date: 5-Mar-2011
https://dl.acm.org/doi/10.1145/1961296.1950395
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Simulating and compiling a hypothetical microprogrammed architecture with projects for computer architecture and compiler design

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Published In

ACM SIGCSE Bulletin Volume 25, Issue 2

June 1993

65 pages

ISSN:0097-8418

DOI:10.1145/152751

Editor:
James E. Miller
Univ. of Southern Mississippi, Hattiesburg

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Association for Computing Machinery

New York, NY, United States

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Published: 01 June 1993

Published in SIGCSE Volume 25, Issue 2

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Mendes JPanicker R(2024)RISCALAR: A Cycle-Approximate, Parametrisable RISC-V Microarchitecture Explorer & Simulator2024 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS58744.2024.10558557(1-5)Online publication date: 19-May-2024
https://doi.org/10.1109/ISCAS58744.2024.10558557
Nordström M(2011)Educators' strategies for object-oriented analysis and designACM Inroads10.1145/2038876.20388922:4(50-58)Online publication date: 1-Dec-2011
https://dl.acm.org/doi/10.1145/2038876.2038892
Zhang WLim JOlichandran RScherpelz JJin GLu SReps T(2011)ConSeqACM SIGPLAN Notices10.1145/1961296.195039546:3(251-264)Online publication date: 5-Mar-2011
https://dl.acm.org/doi/10.1145/1961296.1950395
Dalessandro LCarouge FWhite SLev YMoir MScott MSpear M(2011)Hybrid NOrecACM SIGPLAN Notices10.1145/1961296.195037346:3(39-52)Online publication date: 5-Mar-2011
https://dl.acm.org/doi/10.1145/1961296.1950373
Casper JOguntebi THong SBronson NKozyrakis COlukotun K(2011)Hardware acceleration of transactional memory on commodity systemsACM SIGPLAN Notices10.1145/1961296.195037246:3(27-38)Online publication date: 5-Mar-2011
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Dillig IDillig TAiken A(2010)Reasoning about the unknown in static analysisCommunications of the ACM10.1145/1787234.178725953:8(115-123)Online publication date: 1-Aug-2010
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Bojinov HBursztein EBoneh D(2010)The emergence of cross channel scriptingCommunications of the ACM10.1145/1787234.178725753:8(105-113)Online publication date: 1-Aug-2010
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Touretzky D(2010)Preparing computer science students for the robotics revolutionCommunications of the ACM10.1145/1787234.178724453:8(27-29)Online publication date: 1-Aug-2010
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Maj SVeal DDuley R(2001)A proposed new high level abstraction for computer technologyACM SIGCSE Bulletin10.1145/366413.36458433:1(199-203)Online publication date: 1-Feb-2001
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Maj SVeal DDuley RWalker HMcCauley RGersting JRussell I(2001)A proposed new high level abstraction for computer technologyProceedings of the thirty-second SIGCSE technical symposium on Computer Science Education10.1145/364447.364584(199-203)Online publication date: 1-Feb-2001
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Compiling for the multiscalar architecture

Compiler Processor Tradeoffs for DISVLIW Architecture

Compiling C on a Multiple-Stack Architecture

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