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Dynamic thread and data mapping for NoC based CMPs

Published: 26 July 2009 Publication History

Abstract

Thread mapping and data mapping are two important problems in the context of NoC (network-on-chip) based CMPs (chip multiprocessors). While a compiler can determine suitable mappings for data and threads, such static mappings may not work well for multithreaded applications that go through different execution phases during their execution, each phase with potentially different data access patterns than others. Instead, a dynamic mapping strategy, if its overheads can be kept low, may be a more promising option. In this work, we present dynamic (runtime) thread and data mappings for NoC based CMPs. The goal of these mappings is to reduce the distance between the location of the core that requests data and the core whose local memory contains that requested data. In our experiments, we evaluate our proposed thread mapping and data mapping in isolation as well as in an integrated manner.

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Cited By

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  • (2021)Accelerating Machine Learning Algorithms with TensorFlow Using Thread Mapping PoliciesHigh Performance Computing10.1007/978-3-030-68035-0_5(62-70)Online publication date: 3-Feb-2021
  • (2016)The slowdown or race-to-idle questionProceedings of the 2016 Conference on Design, Automation & Test in Europe10.5555/2971808.2971932(535-538)Online publication date: 14-Mar-2016
  • (2015)Effects of Nondeterminism in Hardware and Software Simulation with Thread Mapping2015 28th International Conference on VLSI Design10.1109/VLSID.2015.27(129-134)Online publication date: Jan-2015
  • Show More Cited By

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    cover image ACM Conferences
    DAC '09: Proceedings of the 46th Annual Design Automation Conference
    July 2009
    994 pages
    ISBN:9781605584973
    DOI:10.1145/1629911
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 26 July 2009

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    Author Tags

    1. CMP
    2. NoC
    3. data
    4. dynamic
    5. mapping
    6. thread

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    DAC '09
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    DAC '09: The 46th Annual Design Automation Conference 2009
    July 26 - 31, 2009
    California, San Francisco

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    Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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    Cited By

    View all
    • (2021)Accelerating Machine Learning Algorithms with TensorFlow Using Thread Mapping PoliciesHigh Performance Computing10.1007/978-3-030-68035-0_5(62-70)Online publication date: 3-Feb-2021
    • (2016)The slowdown or race-to-idle questionProceedings of the 2016 Conference on Design, Automation & Test in Europe10.5555/2971808.2971932(535-538)Online publication date: 14-Mar-2016
    • (2015)Effects of Nondeterminism in Hardware and Software Simulation with Thread Mapping2015 28th International Conference on VLSI Design10.1109/VLSID.2015.27(129-134)Online publication date: Jan-2015
    • (2015)RISO: Enforce Noninterfered Performance With Relaxed Network-on-Chip Isolation in Many-Core Cloud ProcessorsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2014.238735123:12(3053-3064)Online publication date: 1-Dec-2015
    • (2014)Scenario-aware data placement and memory area allocation for multi-processor system-on-chips with reconfigurable 3D-stacked SRAMsProceedings of the conference on Design, Automation & Test in Europe10.5555/2616606.2617069(1-6)Online publication date: 24-Mar-2014
    • (2014)Static thread mapping for NoCs via binary instrumentation traces2014 IEEE 32nd International Conference on Computer Design (ICCD)10.1109/ICCD.2014.6974731(517-520)Online publication date: Oct-2014
    • (2013)RISOProceedings of the 50th Annual Design Automation Conference10.1145/2463209.2488781(1-6)Online publication date: 29-May-2013
    • (2013)Energy-efficient multithreading for a hierarchical heterogeneous multicore through locality-cognizant thread generationJournal of Parallel and Distributed Computing10.1016/j.jpdc.2013.07.01173:12(1551-1562)Online publication date: 1-Dec-2013
    • (2012)BibliographyAutonomic Networking-on-Chip10.1201/b11421-10(215-242)Online publication date: 4-Jan-2012
    • (2011)Energy and Performance Efficient Thread Mapping in NoC-Based CMPs under Process VariationsProceedings of the 2011 International Conference on Parallel Processing10.1109/ICPP.2011.48(41-50)Online publication date: 13-Sep-2011
    • Show More Cited By

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