An optimization framework for embedded processors with auto-addressing mode
Article No.: 11, Pages 1 - 41
Abstract
Modern embedded processors with dedicated address generation unit support memory accesses through auto-increment/decrement addressing mode. The auto-increment/decrement mode, if properly utilized, can save address arithmetic instructions, reduce static and dynamic memory footprint of the program, and speed up the execution as well.
Liao [1995, 1996] categorized this problem as Simple Offset Assignment (SOA) and General Offset Assignment (GOA), which involves storage layout of variables and assignment of address registers, respectively, proposing several heuristic solutions. This article proposes a new direction for investigating the solution space of the problem. The general idea [Zhuang 2003] is to perform simplification of the underlying access graph through coalescence of the memory locations of program variables. A comprehensive framework is proposed including coalescence-based offset assignment and post/pre-optimization. Variables not interfering with others (not simultaneously live at any program point) can be coalesced into the same memory location. Coalescing allows simplifications of the access graph yielding better SOA solutions; it also reduces the address register pressure to such low values that some GOA solutions become optimal. Moreover, it can reduce the memory footprint both statically and at runtime for stack variables. Our second optimization (post/pre-optimization) considers both post- and pre-modification mode for optimizing code across basic blocks, which makes it useful. Making use of both addressing modes further reduces SOA/GOA cost and our post/pre-optimization phase is optimal in selecting post or pre mode after variable offsets have been determined.
We have shown the advantages of our framework over previous approaches to capture more opportunities to reduce both stack size and SOA/GOA cost, leading to more speedup.
References
[1]
Aho, A.V., Sethi, R., and Ullman, J. D. 1986. Compilers: Principles, Techniques and Tools. Addison-Wesley, Reading, MA.
[2]
Araujo, G., Sudarsanam, A., and Malik, S. 1996. Instruction set design and optimizations for address computation in DSP processors. In Proceedings of the 9th International Symposium on Systems Synthesis. IEEE, 31--37.
[3]
Atri, S. 1999. Improved code optimization techniques for embedded processors. Master's thesis, Department of Electrical and Computer Engineering, Louisiana State University.
[4]
Atri, S., Ramanujam, J., and Kandemir, M. 2000. Improving variable placement for embedded processors. In Proceedings of the Conference on Languages and Compilers for High-Performance Computing.
[5]
Bartley, D. H. 1992. Optimizing stack frame accesses for processors with restricted addressing modes. Softw. Pract. Exper. 22, 2, 101--110.
[6]
Chaitin, G. J., Auslander, M. A., Chandra, A. K., Cocke, J., Hopkins, M. E., and Markstein, P. W. 1981. Register allocation via coloring. Comput. Lang. 6, 1, 47--57.
[7]
Chaitin, G. J. 1982. Register allocation and spilling via graph coloring. In Proceedings of the SIGPLAN Symposium on Compiler Construction.
[8]
Ganssle, J. G. 1992. The Art of Programming Embedded Systems. Academic Press, San Diego, CA.
[9]
Gebotys, C. 1997. DSP address optimization using a minimum cost circulation technique. In Proceedings of the International Conference on Computer-Aided Design (ICCAD). IEEE, 100--103.
[10]
Kandemir, M., Irwin, M. J., Chen, G., and Ramanujam, J. 2003. Address register assignment for reducing code size. In Proceedings of the 12th International Conference on Compiler Construction (CC'03).
[11]
Lee, C., Potkonjak, M., and Mangione-Smith, W. H. 1997. Mediabench: A tool for evaluating and synthesizing multimedia and communications systems. In Proceedings of the International Symposium on Microarchitecture.
[12]
Leupers, R., Basu, A., and Marwedel, P. 1998. Optimized array index computation in DSP programs. In Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC). IEEE.
[13]
Leupers, R. and Marwedel, P. 1996. Algorithms for address assignment in DSP code generation. In Proceedings of the International Conference on Computer Aided Design (ICCAD). 109--112.
[14]
Leupers, R. and David, F. 1998. A uniform optimization technique for offset assignment problems. In Proceedings of the International System Synthesis Symposium (ISSS).
[15]
Leupers, R. 2003. Offset assignment showdown: Evaluation of DSP address code optimization algorithms. In Proceedings of the 12th International Conference on Compiler Construction (CC'03).
[16]
Liao, S. Y., Devadas, S., Keutzer, K., Tjiang, S., and Wang, A. 1995. Storage assignment to decrease code size. In Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI). 186--195.
[17]
Liao, S. Y., Devadas, S., Keutzer, K., Tjiang, S., and Wang, A. 1996. Storage assignment to decrease code size. ACM Trans. Program. Lang. Syst. 18, 3, 235--253.
[18]
Motorola, Inc. 2000. Motorola DSP56300 family manual, revision 3.0.
[19]
Motorola, Inc. 2001. SC140 DSP core reference manual, revision 3.0.
[20]
Motorola, Inc. Motorola DSP56300 family optimizing C compiler user's manual. Motorola, Inc.
[21]
Muchnick, S. S. 1997. Advanced Compiler Design and Implementation. Morgan Kaufman, San Francisco, CA.
[22]
Ottoni, D., Ottoni, G., Araujo, G., and Leupers, R. 2003. Improving offset assignment through simultaneous variable coalescing. In Proceeding of the International Workshop on Software and Compilers for Embedded Systems (SCOPES).
[23]
Ottoni, G., Rigo, S., Araujo, G., Rajagopalan, S., and Malik, S. 2001. Optimal live range merge for address register allocation in embedded programs. In Proceeding of the International Conference on Compiler Construction (CC).
[24]
Ottoni, D., Ottoni, G., Araujo, G., and Leupers, R. 2006. Offset assignment using simultaneous variable coalescing. ACM Trans. Embed. Comput. Syst. 5, 4, 864--883.
[25]
Rao, A. 1998. Compiler optimizations for storage assignment on embedded DSPs. M. S. thesis, Department of Electrical and Computer Engineering and Computer Science, University of Cincinnati.
[26]
Rao, A. and Pande, S. 1999. Storage assignment optimizations to generate compact and efficient code on embedded DSPs. In Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI). 128--138.
[27]
Stallman, R. 2002a. Using the GNU compiler collection. In User's Manual. Free Software Foundation. Boston, MA.
[28]
Stallman, R. 2002b. GNU compiler collection internals. In Reference Manual, Free Software Foundation, Boston, MA.
[29]
Sudarsanam, A., Liao, S., and Devadas, S. 1997a. Analysis and evaluation of address arithmetic capabilities in custom DSP architectures. In Proceedings of the ACM/IEEE Design Automation Conference (DAC). 287--292.
[30]
Sudarsanam, A., Malik, S., Tjiang, S., and Liao, S. 1997b. Optimization of embedded DSP programs using post-pass data-flow analysis. In Proceedings of the International Conference on Acoustics, Speech, and Signal Processing (ICCAD).
[31]
Udayanarayanan, S. and Chakrabarti, C. 2001. Address code generation for digital signal processors. In Proceedings of the 38th Design Automation Conference (DAC).
[32]
Zhang, Y. and Yang, J. 2003. Procedural level address offset assignment of DSP applications with loops. In Proceedings of the International Conference on Parallel Processing (ICPP).
[33]
Zhuang, X., Lau, C., and Pande, S. 2003. Storage assignment optimizations through variable coalescence for embedded processors. In Proceedings of the Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES).
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- An optimization framework for embedded processors with auto-addressing mode
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Publication History
Published: 22 April 2010
Accepted: 01 August 2009
Revised: 01 May 2009
Received: 01 July 2008
Published in TOPLAS Volume 32, Issue 4
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