research-article

An effective GPU implementation of breadth-first search

Authors:

Lijuan Luo,

Martin Wong, and

Wen-mei HwuAuthors Info & Claims

DAC '10: Proceedings of the 47th Design Automation Conference

June 2010

Pages 52 - 55

https://doi.org/10.1145/1837274.1837289

Published: 13 June 2010 Publication History

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Abstract

Breadth-first search (BFS) has wide applications in electronic design automation (EDA) as well as in other fields. Researchers have tried to accelerate BFS on the GPU, but the two published works are both asymptotically slower than the fastest CPU implementation. In this paper, we present a new GPU implementation of BFS that uses a hierarchical queue management technique and a three-layer kernel arrangement strategy. It guarantees the same computational complexity as the fastest sequential version and can achieve up to 10 times speedup.

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Cited By

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Akbarzadeh NDarabi SGheibi-Fetrat AMirzaei ASadrosadati MSarbazi-Azad H(2024)H3DM: A High-bandwidth High-capacity Hybrid 3D Memory Design for GPUsProceedings of the ACM on Measurement and Analysis of Computing Systems10.1145/36390388:1(1-28)Online publication date: 21-Feb-2024
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Zhang YLuo GWang WCao SDong SYu DWang XWang K(2024)TTN: Topological Transformer Network for Automated Coronary Artery Branch Labeling in Cardiac CT AngiographyIEEE Journal of Translational Engineering in Health and Medicine10.1109/JTEHM.2023.332903112(129-139)Online publication date: 2024
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An effective GPU implementation of breadth-first search

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Published In

DAC '10: Proceedings of the 47th Design Automation Conference

June 2010

1036 pages

ISBN:9781450300025

DOI:10.1145/1837274

General Chair:
Sachin Sapatnekar
Univ. of Minnesota, Minneapolis, MN

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 13 June 2010

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DAC '10

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DAC '10: The 47th Annual Design Automation Conference 2010

June 13 - 18, 2010

California, Anaheim

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

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https://dl.acm.org/doi/10.1145/3639038
Zhang YLuo GWang WCao SDong SYu DWang XWang K(2024)TTN: Topological Transformer Network for Automated Coronary Artery Branch Labeling in Cardiac CT AngiographyIEEE Journal of Translational Engineering in Health and Medicine10.1109/JTEHM.2023.332903112(129-139)Online publication date: 2024
https://doi.org/10.1109/JTEHM.2023.3329031
Moori MRocha HLorenzon ABeck A(2024)Allok: a machine learning approach for efficient graph execution on CPU–GPU clustersThe Journal of Supercomputing10.1007/s11227-024-06079-9Online publication date: 23-May-2024
https://doi.org/10.1007/s11227-024-06079-9
Đukić JMišić M(2023)An Evaluation of Directive-Based Parallelization on the GPU Using a Parboil BenchmarkElectronics10.3390/electronics1222455512:22(4555)Online publication date: 7-Nov-2023
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Hsieh CCheng PChang CKuo S(2023)A Decentralized Frontier Queue for Improving Scalability of Breadth-First-Search on GPUs2023 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE56975.2023.10137054(1-6)Online publication date: Apr-2023
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Moori Mde A. Rocha HSilva MSchwarzrock JLorenzon ABeck A(2023)Automatic CPU-GPU Allocation for Graph Execution2023 31st Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP)10.1109/PDP59025.2023.00013(27-34)Online publication date: Mar-2023
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