A high speed, highly linear CMOS fully differential track and hold circuit
Authors: 
Shaahin Haddadi Nejad, Ziaaddin Daie Kouzekanani, Jafar Sobhi, Iman Salami Fard, Kuresh GhanbariAuthors Info & Claims
Shaahin Haddadi Nejad, Ziaaddin Daie Kouzekanani, Jafar Sobhi, Iman Salami Fard, Kuresh GhanbariAuthors Info & ClaimsPages 23 - 27
Abstract
A fully differential high speed and highly linear CMOS Track-and-Hold amplifier (THA) that was used in front end of an Pipline ADC is described here. The architecture of Track-and-Hold based on an open-loop architecture with Miller hold capacitance. The Track-and-Hold circuit consists of an op-amp with low impedance nodes and properly voltage gain and bootstrapped switches. Designed circuit is simulated in a standard 0.35 um CMOS technology, the THA achieves -75.7 dB THD (Total Harmonic Distortion) for 1.6 Vp-p, 86 MHz input at 320 MHz sampling rate. The circuit design of major building blocks is described in details.
References
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Index Terms
- A high speed, highly linear CMOS fully differential track and hold circuit
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Information & Contributors
Information
Published In
September 2010
228 pages
ISBN:9781450301527
DOI:10.1145/1854153
- General Chair:
- João Antonio Martino,
- Program Chairs:
- Guido Araújo,
- Alex Orailoglu,
- Publications Chair:
- Felipe Klein
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Published: 06 September 2010
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SBCCI '10
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SBCCI '10: 23rd Symposium on Integrated Circuits and Systems Design
September 6 - 9, 2010
São Paulo, Brazil
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