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Balancing memory and performance through selective flushing of software code caches

Published: 24 October 2010 Publication History

Abstract

Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all platforms, and especially embedded systems. The memory demand is typically controlled by placing a limit on cached translations and forcing the DBT to flush all translations upon reaching the limit. This solution manifests as a performance inefficiency because many flushed translations require retranslation. Ideally, translations should be selectively flushed to minimize retranslations for a given memory limit. However, three obstacles exist:(1) it is difficult to predict which selections will minimize retranslation,(2) selective flushing results in greater book-keeping overheads than full flushing, and(3) the emergence of multicore processors and multi-threaded programming complicates most flushing algorithms. These issues have led to the widespread adoption of full flushing as a standard protocol. In this paper, we present a partial flushing approach aimed at reducing retranslation overhead and improving overall performance, given a fixed memory budget. Our technique applies uniformly to single-threaded and multi-threaded guest applications

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  • (2016)Code cache management in managed language VMs to reduce memory consumption for embedded systemsProceedings of the 17th ACM SIGPLAN/SIGBED Conference on Languages, Compilers, Tools, and Theory for Embedded Systems10.1145/2907950.2907958(11-20)Online publication date: 13-Jun-2016
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cover image ACM Conferences
CASES '10: Proceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems
October 2010
276 pages
ISBN:9781605589039
DOI:10.1145/1878921
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 24 October 2010

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Author Tags

  1. code cache
  2. dynamic binary translation
  3. eviction
  4. flushing
  5. software dynamic translation
  6. virtual execution environments

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  • Research-article

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ESWeek '10
ESWeek '10: Sixth Embedded Systems Week
October 24 - 29, 2010
Arizona, Scottsdale, USA

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Overall Acceptance Rate 52 of 230 submissions, 23%

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Cited By

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  • (2019)CslimProceedings of the 20th International Conference on Distributed Computing and Networking10.1145/3288599.3296013(421-426)Online publication date: 4-Jan-2019
  • (2016)Code cache management in managed language VMs to reduce memory consumption for embedded systemsACM SIGPLAN Notices10.1145/2980930.290795851:5(11-20)Online publication date: 13-Jun-2016
  • (2016)Code cache management in managed language VMs to reduce memory consumption for embedded systemsProceedings of the 17th ACM SIGPLAN/SIGBED Conference on Languages, Compilers, Tools, and Theory for Embedded Systems10.1145/2907950.2907958(11-20)Online publication date: 13-Jun-2016
  • (2014)Call sequence prediction through probabilistic calling automataACM SIGPLAN Notices10.1145/2714064.266022149:10(745-762)Online publication date: 15-Oct-2014
  • (2014)Call sequence prediction through probabilistic calling automataProceedings of the 2014 ACM International Conference on Object Oriented Programming Systems Languages & Applications10.1145/2660193.2660221(745-762)Online publication date: 15-Oct-2014
  • (2014)A compiler framework for automatically mapping data parallel programs to heterogeneous MPSoCsProceedings of the 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems10.1145/2656106.2656107(1-10)Online publication date: 12-Oct-2014
  • (2013)Performance analysis and predictability of the software layer in dynamic binary translators/optimizersProceedings of the ACM International Conference on Computing Frontiers10.1145/2482767.2482786(1-10)Online publication date: 14-May-2013
  • (2013)Enabling dynamic binary translation in embedded systems with scratchpad memoryACM Transactions on Embedded Computing Systems10.1145/2362336.239917811:4(1-33)Online publication date: 1-Jan-2013
  • (2011)Dynamic Binary Modification: Tools, Techniques, and ApplicationsSynthesis Lectures on Computer Architecture10.2200/S00345ED1V01Y201104CAC0156:2(1-81)Online publication date: 28-Mar-2011
  • (2011)Process-level virtualization for runtime adaptation of embedded softwareProceedings of the 48th Design Automation Conference10.1145/2024724.2024924(895-900)Online publication date: 5-Jun-2011

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