research-article

Optimal WCET-aware code selection for scratchpad memory

Authors:

Sri ParameswaranAuthors Info & Claims

EMSOFT '10: Proceedings of the tenth ACM international conference on Embedded software

Pages 59 - 68

https://doi.org/10.1145/1879021.1879030

Published: 24 October 2010 Publication History

Abstract

We propose the first polynomial-time code selection algorithm for minimising the worst-case execution time of a non-nested loop executed on a fully pipelined processor that uses scratchpad memory to replace the instruction cache. The time complexity of our algorithm is O(m(ne+n² log n)), where n and e are the number of basic blocks and the number of edges in the control flow graph of the loop, and m is the size of the scratchpad memory. Furthermore, we propose the first dynamic code selection heuristic for minimising the worst-case execution time of a task by using our algorithm for a non-nested loop. Our simulation results show that our heuristic significantly outperforms a previously known heuristic

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Cited By

Li JXue JXie XWan QTan QTan L(2018)EpipeJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2013.06.00359:10(1383-1393)Online publication date: 30-Dec-2018
https://dl.acm.org/doi/10.1016/j.sysarc.2013.06.003
Kim YBroman DShrivastava A(2017)WCET-Aware Function-Level Dynamic Code Management on Scratchpad MemoryACM Transactions on Embedded Computing Systems10.1145/306338316:4(1-26)Online publication date: 11-May-2017
https://dl.acm.org/doi/10.1145/3063383
Kafshdooz MTaram MAssadi SEjlali A(2016)A Compile-Time Optimization Method for WCET Reduction in Real-Time Embedded Systems through Block FormationACM Transactions on Architecture and Code Optimization10.1145/284508312:4(1-25)Online publication date: 4-Jan-2016
https://dl.acm.org/doi/10.1145/2845083
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Optimal WCET-aware code selection for scratchpad memory

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cover image ACM Conferences

EMSOFT '10: Proceedings of the tenth ACM international conference on Embedded software

October 2010

318 pages

ISBN:9781605589046

DOI:10.1145/1879021

Program Chairs:
Luca Carloni
Columbia University, USA
,
Stavros Tripakis
University of California, Berkeley, USA

Copyright © 2010 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 24 October 2010

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ESWeek '10: Sixth Embedded Systems Week

October 24 - 29, 2010

Arizona, Scottsdale, USA

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Overall Acceptance Rate 60 of 203 submissions, 30%

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Cited By

Li JXue JXie XWan QTan QTan L(2018)EpipeJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2013.06.00359:10(1383-1393)Online publication date: 30-Dec-2018
https://dl.acm.org/doi/10.1016/j.sysarc.2013.06.003
Kim YBroman DShrivastava A(2017)WCET-Aware Function-Level Dynamic Code Management on Scratchpad MemoryACM Transactions on Embedded Computing Systems10.1145/306338316:4(1-26)Online publication date: 11-May-2017
https://dl.acm.org/doi/10.1145/3063383
Kafshdooz MTaram MAssadi SEjlali A(2016)A Compile-Time Optimization Method for WCET Reduction in Real-Time Embedded Systems through Block FormationACM Transactions on Architecture and Code Optimization10.1145/284508312:4(1-25)Online publication date: 4-Jan-2016
https://dl.acm.org/doi/10.1145/2845083
Shrivastava ADutt NCai JShoushtari MDonyanavard BTajik H(2016)Automatic management of Software Programmable Memories in Many-core ArchitecturesIET Computers & Digital Techniques10.1049/iet-cdt.2016.002410:6(288-298)Online publication date: 1-Nov-2016
https://doi.org/10.1049/iet-cdt.2016.0024
Huang YZhao MXue C(2015)Joint WCET and Update Activity Minimization for Cyber-Physical SystemsACM Transactions on Embedded Computing Systems10.1145/268053914:1(1-21)Online publication date: 21-Jan-2015
https://dl.acm.org/doi/10.1145/2680539
Huangfu YZhang W(2015)Hardware-Based Performance Enhancement Guaranteed CachesProceedings of the 2015 IEEE 18th International Symposium on Real-Time Distributed Computing10.1109/ISORC.2015.11(166-173)Online publication date: 13-Apr-2015
https://dl.acm.org/doi/10.1109/ISORC.2015.11
Huang YShi LLi JLi QXue C(2014)WCET-Aware Re-Scheduling Register Allocation for Real-Time Embedded Systems With Clustered VLIW ArchitectureIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2012.223611422:1(168-180)Online publication date: 1-Jan-2014
https://dl.acm.org/doi/10.1109/TVLSI.2012.2236114
Kim YBroman DCai JShrivastaval A(2014)WCET-aware dynamic code management on scratchpads for Software-Managed Multicores2014 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS)10.1109/RTAS.2014.6926001(179-188)Online publication date: Apr-2014
https://doi.org/10.1109/RTAS.2014.6926001
Huangfu YZhang W(2014)A Real-Time Instruction Cache with High Average-Case PerformanceProceedings of the 2014 IEEE 17th International Symposium on Object/Component-Oriented Real-Time Distributed Computing10.1109/ISORC.2014.59(109-116)Online publication date: 10-Jun-2014
https://dl.acm.org/doi/10.1109/ISORC.2014.59
Zhang WWu L(2014)Exploiting Hybrid SPM-Cache Architectures to Reduce Energy Consumption for Embedded ComputingProceedings of the 2014 IEEE Intl Conf on High Performance Computing and Communications, 2014 IEEE 6th Intl Symp on Cyberspace Safety and Security, 2014 IEEE 11th Intl Conf on Embedded Software and Syst (HPCC,CSS,ICESS)10.1109/HPCC.2014.59(340-347)Online publication date: 20-Aug-2014
https://dl.acm.org/doi/10.1109/HPCC.2014.59
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