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Precise and efficient parametric path analysis

Published: 11 April 2011 Publication History

Abstract

Hard real-time systems require tasks to finish in time. To guarantee the timeliness of such a system, static timing analyses derive upper bounds on the worst-case execution time (WCET) of tasks. There are two types of timing analyses: numeric and parametric. A numeric analysis derives a numeric timing bound and, to this end, assumes all information such as loop bounds to be given a priori. If these bounds are unknown during analysis time, a parametric analysis can compute a timing formula parametric in these variables. A performance bottleneck of timing analyses, numeric and especially parametric, is the so-called path analysis, which determines the path in the analyzed task with the longest execution time bound.
In this paper, we present a new approach to path analysis. This approach exploits the often rather regular structure of software for hard real-time and safety-critical systems. As we show in the evaluation of this paper, we strongly improve upon former techniques in terms of precision and runtime in the parametric case. Even in the numeric case, the approach competes with state-of-the-art techniques and may be an alternative to commercial tools employed for path analysis.

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  • (2023)WCET analysis with procedure arguments as parametersProceedings of the 31st International Conference on Real-Time Networks and Systems10.1145/3575757.3593655(11-22)Online publication date: 7-Jun-2023
  • (2018)Graph partitioning applied to DAG scheduling to reduce NUMA effectsACM SIGPLAN Notices10.1145/3200691.317853553:1(419-420)Online publication date: 10-Feb-2018
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Published In

cover image ACM SIGPLAN Notices
ACM SIGPLAN Notices  Volume 46, Issue 5
LCTES '10
May 2011
170 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/2016603
Issue’s Table of Contents
  • cover image ACM Conferences
    LCTES '11: Proceedings of the 2011 SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
    April 2011
    182 pages
    ISBN:9781450305556
    DOI:10.1145/1967677
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 11 April 2011
Published in SIGPLAN Volume 46, Issue 5

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Author Tags

  1. graph theory
  2. parametric timing analysis

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Cited By

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  • (2024)Parametric WCET as a function of procedure argumentsJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2024.103086148:COnline publication date: 1-Mar-2024
  • (2023)WCET analysis with procedure arguments as parametersProceedings of the 31st International Conference on Real-Time Networks and Systems10.1145/3575757.3593655(11-22)Online publication date: 7-Jun-2023
  • (2018)Graph partitioning applied to DAG scheduling to reduce NUMA effectsACM SIGPLAN Notices10.1145/3200691.317853553:1(419-420)Online publication date: 10-Feb-2018
  • (2018)Register-based implementation of the sparse general matrix-matrix multiplication on GPUsACM SIGPLAN Notices10.1145/3200691.317852953:1(407-408)Online publication date: 10-Feb-2018
  • (2018)Designing scalable FPGA architectures using high-level synthesisACM SIGPLAN Notices10.1145/3200691.317852753:1(403-404)Online publication date: 10-Feb-2018
  • (2018)High-performance genomic analysis framework with in-memory computingACM SIGPLAN Notices10.1145/3200691.317851153:1(317-328)Online publication date: 10-Feb-2018
  • (2018)SuperneuronsACM SIGPLAN Notices10.1145/3200691.317849153:1(41-53)Online publication date: 10-Feb-2018
  • (2016)Fast and Precise Worst-Case Interference Placement for Shared Cache AnalysisACM Transactions on Embedded Computing Systems10.1145/285415115:3(1-26)Online publication date: 7-Mar-2016
  • (2014)Computing maximum blocking times with explicit path analysis under non-local flow boundsProceedings of the 14th International Conference on Embedded Software10.1145/2656045.2656051(1-10)Online publication date: 12-Oct-2014
  • (2014)EfficiencyInteractions10.1145/257597921:2(24-25)Online publication date: 1-Mar-2014
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