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AstroLIT: enabling simulation-based microarchitecture comparison between Intel® and Transmeta designs

Published: 03 May 2011 Publication History

Abstract

While the out-of-order engine has been the mainstream micro-architecture-design paradigm to achieve high performance, Transmeta took a different approach using dynamic binary translation (BT). To enable detailed comparison of these two radically different processor-design approaches, it is natural to leverage well-established simulation-based methodologies. However, BT-based processor designs pose new challenges to standard sampling-based simulation methodologies. This paper describes these challenges, and it also introduces the AstroLIT methodology to address them.

References

[1]
J. C. Dehnert, B. K. Grant, J. P. Banning, R. Johnson, T. Kistler, A. Klaiber, and J. Mattson. The Transmeta Code Morphing Software: using speculation, recovery, and adaptive retranslation to address real-life challenges. In CGO, 2003.
[2]
T. Sherwood, E. Perelman, G. Hamerly, and B. Calder. Automatically characterizing large scale program behavior. In ASPLOS, 2002.
[3]
R. Singhal, K. S. Venkatraman, E. R. Cohn, J. G. Holm, D. A. Koufaty, M.-J. Lin, M. J. Madhav, M. Mattwandel, N. Nidhi, J. D. Pearce, and M. Seshadri. Performance analysis and validation of the Intel® Pentium® 4 processor on 90nm technology. Intel Technology Journal, 2004.
[4]
R. E. Wunderlich, T. F. Wenisch, B. Falsafi, and J. C. Hoe. SMARTS: Accelerating microarchitecture simulation via rigorous statistical sampling. In ISCA, 2003.

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  • (2014)Speculative hardware/software co-designed floating-point multiply-add fusionACM SIGARCH Computer Architecture News10.1145/2654822.254197842:1(623-638)Online publication date: 24-Feb-2014
  • (2014)Speculative hardware/software co-designed floating-point multiply-add fusionACM SIGPLAN Notices10.1145/2644865.254197849:4(623-638)Online publication date: 24-Feb-2014
  • (2014)DTTProceedings of the 11th ACM Conference on Computing Frontiers10.1145/2597917.2597944(1-10)Online publication date: 20-May-2014
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  1. AstroLIT: enabling simulation-based microarchitecture comparison between Intel® and Transmeta designs

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      cover image ACM Conferences
      CF '11: Proceedings of the 8th ACM International Conference on Computing Frontiers
      May 2011
      268 pages
      ISBN:9781450306980
      DOI:10.1145/2016604

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      Association for Computing Machinery

      New York, NY, United States

      Publication History

      Published: 03 May 2011

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      Author Tags

      1. dynamic binary translation
      2. microarchitecture simulation
      3. sampling

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      • Research-article

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      CF'11
      Sponsor:
      CF'11: Computing Frontiers Conference
      May 3 - 5, 2011
      Ischia, Italy

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      Overall Acceptance Rate 273 of 785 submissions, 35%

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      Cited By

      View all
      • (2014)Speculative hardware/software co-designed floating-point multiply-add fusionACM SIGARCH Computer Architecture News10.1145/2654822.254197842:1(623-638)Online publication date: 24-Feb-2014
      • (2014)Speculative hardware/software co-designed floating-point multiply-add fusionACM SIGPLAN Notices10.1145/2644865.254197849:4(623-638)Online publication date: 24-Feb-2014
      • (2014)DTTProceedings of the 11th ACM Conference on Computing Frontiers10.1145/2597917.2597944(1-10)Online publication date: 20-May-2014
      • (2014)Accurate off-line phase classification for HW/SW co-designed processorsProceedings of the 11th ACM Conference on Computing Frontiers10.1145/2597917.2597937(1-10)Online publication date: 20-May-2014
      • (2014)Warm-Up Simulation Methodology for HW/SW Co-Designed ProcessorsProceedings of Annual IEEE/ACM International Symposium on Code Generation and Optimization10.1145/2581122.2544142(284-294)Online publication date: 15-Feb-2014
      • (2014)Warm-Up Simulation Methodology for HW/SW Co-Designed ProcessorsProceedings of Annual IEEE/ACM International Symposium on Code Generation and Optimization10.1145/2544137.2544142(284-294)Online publication date: 15-Feb-2014
      • (2014)Speculative hardware/software co-designed floating-point multiply-add fusionProceedings of the 19th international conference on Architectural support for programming languages and operating systems10.1145/2541940.2541978(623-638)Online publication date: 24-Feb-2014

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