High effective-resolution built-in jitter characterization with quantization noise shaping
Authors: 
Leyi Yin, Yongtae Kim, Peng LiAuthors Info & Claims
Leyi Yin, Yongtae Kim, Peng LiAuthors Info & ClaimsPages 765 - 770
Abstract
A novel built-in jitter characterization architecture combining quantization noise shaping and a partial Vernier delay structure is proposed for high resolution jitter measurement. The effective resolution is optimized at the system level as well as the circuit level. Using 90nm CMOS technology, an area of 0.008mm2 is occupied. The power consumption is 1.85mW. An effective resolution of 1.5ps is achieved.
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- High effective-resolution built-in jitter characterization with quantization noise shaping
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Information
Published In
June 2011
1055 pages
ISBN:9781450306362
DOI:10.1145/2024724
- General Chair:
- Leon Stok,
- Program Chairs:
- Nikil Dutt,
- Soha Hassoun
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Published: 05 June 2011
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