research-article

Saturating the transceiver bandwidth: switch fabric design on FPGAs

Authors:

Jianwen ZhuAuthors Info & Claims

FPGA '12: Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays

Pages 67 - 76

https://doi.org/10.1145/2145694.2145706

Published: 22 February 2012 Publication History

Abstract

Driven by the demand of communication systems, field programmable gate array (FPGA) devices have significantly enhanced their aggregate transceiver bandwidth, reaching terabits per second for the upcoming generation. This paper asks the question whether a single-chip switch fabric can be built that saturates the available transceiver bandwidth.

In answering this question, we propose a new switch fabric organization, called Grouped Crosspoint Queued switch, that brings significant memory efficiency over the state-of-the-art organizations. This makes it possible to build high bandwidth, high radix switches directly on FPGA that rivals ASIC performance. The proposal was validated at small scale by a 16x16 160Gps switch on the available Virtex-6 device, and simulated at a larger scale of fat-tree switching network with 5Tbps capacity.

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Cited By

Papaphilippou PSano KAdhi BLuk W(2023)Experimental Survey of FPGA-Based Monolithic Switches and a Novel Queue BalancerIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2023.324458934:5(1621-1634)Online publication date: May-2023
https://doi.org/10.1109/TPDS.2023.3244589
Papaphilippou PMeng JGebara NLuk W(2021)Hipernetch: High-Performance FPGA Network SwitchACM Transactions on Reconfigurable Technology and Systems10.1145/347705415:1(1-31)Online publication date: 30-Nov-2021
https://dl.acm.org/doi/10.1145/3477054
Campos RCardoso J(2021)On Data Parallelism Code Restructuring for HLS Targeting FPGAs2021 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)10.1109/IPDPSW52791.2021.00029(144-151)Online publication date: Jun-2021
https://doi.org/10.1109/IPDPSW52791.2021.00029
Show More Cited By

Index Terms

Saturating the transceiver bandwidth: switch fabric design on FPGAs
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
      1. Interconnection architectures

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Published In

cover image ACM Conferences

FPGA '12: Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays

February 2012

352 pages

ISBN:9781450311557

DOI:10.1145/2145694

General Chair:
Katherine Compton
University of Wisconsin-Madison
,
Program Chair:
Brad Hutchings
Brigham Young University

Copyright © 2012 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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New York, NY, United States

Publication History

Published: 22 February 2012

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FPGA '12

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SIGDA

FPGA '12: ACM/SIGDA International Symposium on Field Programmable Gate Arrays

February 22 - 24, 2012

California, Monterey, USA

Acceptance Rates

FPGA '12 Paper Acceptance Rate 20 of 87 submissions, 23%;

Overall Acceptance Rate 125 of 627 submissions, 20%

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Cited By

Papaphilippou PSano KAdhi BLuk W(2023)Experimental Survey of FPGA-Based Monolithic Switches and a Novel Queue BalancerIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2023.324458934:5(1621-1634)Online publication date: May-2023
https://doi.org/10.1109/TPDS.2023.3244589
Papaphilippou PMeng JGebara NLuk W(2021)Hipernetch: High-Performance FPGA Network SwitchACM Transactions on Reconfigurable Technology and Systems10.1145/347705415:1(1-31)Online publication date: 30-Nov-2021
https://dl.acm.org/doi/10.1145/3477054
Campos RCardoso J(2021)On Data Parallelism Code Restructuring for HLS Targeting FPGAs2021 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)10.1109/IPDPSW52791.2021.00029(144-151)Online publication date: Jun-2021
https://doi.org/10.1109/IPDPSW52791.2021.00029
Papaphilippou PSano KAdhi BLuk W(2021)Efficient Queue-Balancing Switch for FPGAs2021 International Conference on Field-Programmable Technology (ICFPT)10.1109/ICFPT52863.2021.9609867(1-5)Online publication date: 6-Dec-2021
https://doi.org/10.1109/ICFPT52863.2021.9609867
Papaphilippou PMeng JLuk WNeuendorffer SShannon L(2020)High-Performance FPGA Network Switch ArchitectureProceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays10.1145/3373087.3375299(76-85)Online publication date: 23-Feb-2020
https://dl.acm.org/doi/10.1145/3373087.3375299
Bhowmik BDeka JBiswas S(2020)Improving Reliability in Spidergon Network on Chip-Microprocessors2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS)10.1109/MWSCAS48704.2020.9184540(474-477)Online publication date: Aug-2020
https://doi.org/10.1109/MWSCAS48704.2020.9184540
Bhowmik BBiswas SDeka JBhattacharya B(2020)Locating Open-Channels in Octagon Networks on Chip-Microprocessors2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI49217.2020.00044(200-205)Online publication date: Jul-2020
https://doi.org/10.1109/ISVLSI49217.2020.00044
Meng JGebara NNg HCosta PLuk W(2019)Investigating the Feasibility of FPGA-based Network Switches2019 IEEE 30th International Conference on Application-specific Systems, Architectures and Processors (ASAP)10.1109/ASAP.2019.00010(218-226)Online publication date: Jul-2019
https://doi.org/10.1109/ASAP.2019.00010
Bhowmik BBiswas SDeka JBhattacharya B(2019)A Low-Cost Test Solution for Reliable Communication in Networks-on-ChipJournal of Electronic Testing: Theory and Applications10.1007/s10836-019-05792-135:2(215-243)Online publication date: 1-Apr-2019
https://dl.acm.org/doi/10.1007/s10836-019-05792-1
Gebara NMeng JLuk WCosta P(2018)Scheduling Algorithms for High Performance Network Switching on FPGAs: A Survey2018 International Conference on Field-Programmable Technology (FPT)10.1109/FPT.2018.00033(166-173)Online publication date: Dec-2018
https://doi.org/10.1109/FPT.2018.00033
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