research-article

CMOS compatible many-core noc architectures with multi-channel millimeter-wave wireless links

Authors:

Partha P. Pande,

Benjamin BelzerAuthors Info & Claims

GLSVLSI '12: Proceedings of the great lakes symposium on VLSI

Pages 165 - 170

https://doi.org/10.1145/2206781.2206822

Published: 03 May 2012 Publication History

Abstract

Traditional many-core designs based on the Network-on-Chip (NoC) paradigm suffer from high latency and power dissipation as the system size scales up due to their inherent multi-hop communication. NoC performance can be significantly enhanced by introducing long-range, low power, and high-bandwidth single-hop wireless links between far apart cores. This paper presents a design methodology and performance evaluation for a hierarchical small-world NoC with CMOS compatible on-chip millimeter (mm)-wave wireless long-range communication links. The proposed wireless NoC offers significantly higher bandwidth and lower energy dissipation compared to its conventional non-hierarchical wired counterpart in presence of both uniform and non-uniform traffic patterns. The performance improvement is achieved through efficient data routing and optimum placement of wireless hubs. Multiple wireless shortcuts operating simultaneously provide an energy efficient solution for design of many-core communication infrastructures.

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Cited By

Romera TBriere ADenoulet J(2019)Dynamically Reconfigurable RF-NoC with Distance-Aware Routing Algorithm2019 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)10.1109/ReCoSoC48741.2019.9034949(98-104)Online publication date: Jul-2019
https://doi.org/10.1109/ReCoSoC48741.2019.9034949
Yazdanpanah FAfsharmazayejani RAlaei MRezaei ADaneshtalab M(2019)An energy-efficient partition-based XYZ-planar routing algorithm for a wireless network-on-chipThe Journal of Supercomputing10.1007/s11227-018-2617-x75:2(837-861)Online publication date: 1-Feb-2019
https://dl.acm.org/doi/10.1007/s11227-018-2617-x
Catania VMineo AMonteleone SPalesi MPatti D(2017)Improving Energy Efficiency in Wireless Network-on-Chip ArchitecturesACM Journal on Emerging Technologies in Computing Systems10.1145/313880714:1(1-24)Online publication date: 3-Nov-2017
https://dl.acm.org/doi/10.1145/3138807
Show More Cited By

Index Terms

CMOS compatible many-core noc architectures with multi-channel millimeter-wave wireless links
1. Hardware
  1. Very large scale integration design
    1. VLSI system specification and constraints

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cover image ACM Conferences

GLSVLSI '12: Proceedings of the great lakes symposium on VLSI

May 2012

388 pages

ISBN:9781450312448

DOI:10.1145/2206781

General Chairs:
Erik Brunvard
University of Utah, USA
,
Ken Stevens
University of Utah, USA
,
Program Chairs:
Joseph R. Cavallaro
Rice University, USA
,
Tong Zhang
Rensselaer Polytechnic Institute, USA

Copyright © 2012 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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New York, NY, United States

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Published: 03 May 2012

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GLSVLSI '12

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GLSVLSI '12: Great Lakes Symposium on VLSI 2012

May 3 - 4, 2012

Utah, Salt Lake City, USA

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Overall Acceptance Rate 312 of 1,156 submissions, 27%

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Cited By

Romera TBriere ADenoulet J(2019)Dynamically Reconfigurable RF-NoC with Distance-Aware Routing Algorithm2019 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)10.1109/ReCoSoC48741.2019.9034949(98-104)Online publication date: Jul-2019
https://doi.org/10.1109/ReCoSoC48741.2019.9034949
Yazdanpanah FAfsharmazayejani RAlaei MRezaei ADaneshtalab M(2019)An energy-efficient partition-based XYZ-planar routing algorithm for a wireless network-on-chipThe Journal of Supercomputing10.1007/s11227-018-2617-x75:2(837-861)Online publication date: 1-Feb-2019
https://dl.acm.org/doi/10.1007/s11227-018-2617-x
Catania VMineo AMonteleone SPalesi MPatti D(2017)Improving Energy Efficiency in Wireless Network-on-Chip ArchitecturesACM Journal on Emerging Technologies in Computing Systems10.1145/313880714:1(1-24)Online publication date: 3-Nov-2017
https://dl.acm.org/doi/10.1145/3138807
Mondal HGade SShamim MDeb SGanguly A(2017)Interference-Aware Wireless Network-on-Chip Architecture Using Directional AntennasIEEE Transactions on Multi-Scale Computing Systems10.1109/TMSCS.2016.25955273:3(193-205)Online publication date: 1-Jul-2017
https://doi.org/10.1109/TMSCS.2016.2595527
Kaushik SAgrawal MMondal HGade SDeb S(2017)Path loss-aware adaptive transmission power control scheme for energy-efficient wireless NoC2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)10.1109/MWSCAS.2017.8052878(132-135)Online publication date: Aug-2017
https://doi.org/10.1109/MWSCAS.2017.8052878
Pano VLiu YYilmaz IMore ATaskin BDandekar K(2017)Wireless NoCs Using Directional and Substrate Propagation Antennas2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI.2017.41(188-193)Online publication date: Jul-2017
https://doi.org/10.1109/ISVLSI.2017.41
Mondal HGade SKishore RDeb SFanucci LTeich J(2016)Adaptive multi-voltage scaling in wireless NoC for high performance low power applicationsProceedings of the 2016 Conference on Design, Automation & Test in Europe10.5555/2971808.2972115(1315-1320)Online publication date: 14-Mar-2016
https://dl.acm.org/doi/10.5555/2971808.2972115
Shreedhar TDeb S(2016)Hierarchical Cluster Based NoC Design Using Wireless Interconnects for Coherence SupportProceedings of the 2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID)10.1109/VLSID.2016.54(63-68)Online publication date: 4-Jan-2016
https://dl.acm.org/doi/10.1109/VLSID.2016.54
Mineo APalesi MAscia GCatania V(2016)Runtime Tunable Transmitting Power Technique in mm-Wave WiNoC ArchitecturesIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2015.244927524:4(1535-1545)Online publication date: Apr-2016
https://doi.org/10.1109/TVLSI.2015.2449275
Mondal HGade SKishore RKaushik SDeb S(2016)Power efficient router architecture for wireless Network-on-Chip2016 17th International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED.2016.7479205(227-233)Online publication date: Mar-2016
https://doi.org/10.1109/ISQED.2016.7479205
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