research-article

Synthesis of optimized hardware transactors from abstract communication specifications

Authors:

Andreas GerstlauerAuthors Info & Claims

CODES+ISSS '12: Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis

Pages 403 - 412

https://doi.org/10.1145/2380445.2380508

Published: 07 October 2012 Publication History

Abstract

Increasing system complexity and heterogeneity make system integration and communication synthesis a growing concern. Even with transaction-level modeling and high-level synthesis of hardware, communication interfaces still have to be manually designed at a low protocol level.To address this challenge, we present a design flow for automatic synthesis of hardware transactors, which realize abstractly specified communication semantics on top of protocol-level transactions. Transactor synthesis is tightly coupled with high-level synthesis of computation for integrated computation/communication co-design of complete hardware processors, thus establishing a seamless path from abstract system specifications down to hardware implementations in synthesizable RTL. The flow supports a generic set of communication semantics and target implementations, where transactors are custom-generated for a specific application and architecture combination. Furthermore, we develop protocol stack optimizations that reduce the area and performance overhead of synthesized communication interfaces. We have applied our synthesis flow to several industrial-strength examples under various communication settings. Results show that synthesized interfaces are comparable to manual designs in terms of area and latency, where protocol stack optimizations can reduce area and latency overhead by up to 77% and 21%, respectively.

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Cited By

Schirner GGerstlauer ADömer R(2017)SCE: System-on-Chip EnvironmentHandbook of Hardware/Software Codesign10.1007/978-94-017-7358-4_31-1(1-32)Online publication date: 10-Apr-2017
https://doi.org/10.1007/978-94-017-7358-4_31-1
Schirner GGerstlauer ADömer R(2017)SCE: System-on-Chip EnvironmentHandbook of Hardware/Software Codesign10.1007/978-94-017-7267-9_31(1019-1050)Online publication date: 27-Sep-2017
https://doi.org/10.1007/978-94-017-7267-9_31
Falk JSchwarzer TZhang LGlaß MTeich J(2015)Automatic communication-driven virtual prototyping and design for networked embedded systemsMicroprocessors & Microsystems10.1016/j.micpro.2015.08.00839:8(1012-1028)Online publication date: 1-Nov-2015
https://dl.acm.org/doi/10.1016/j.micpro.2015.08.008
Show More Cited By

Index Terms

Synthesis of optimized hardware transactors from abstract communication specifications
1. Applied computing
  1. Arts and humanities
    1. Architecture (buildings)
      1. Computer-aided design
  2. Physical sciences and engineering
    1. Engineering
      1. Computer-aided design

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Published In

cover image ACM Conferences

CODES+ISSS '12: Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis

October 2012

596 pages

ISBN:9781450314268

DOI:10.1145/2380445

General Chairs:
Ahmed Jerraya
CEA
,
Luca Carloni
Columbia University
,
Program Chairs:
Naehyuck Chang
Seoul National University, Korea
,
Franco Fummi
University of Verona, Italy

Copyright © 2012 ACM.

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Publication History

Published: 07 October 2012

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ESWEEK'12

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ESWEEK'12: Eighth Embedded System Week

October 7 - 12, 2012

Tampere, Finland

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CODES+ISSS '12 Paper Acceptance Rate 48 of 163 submissions, 29%;

Overall Acceptance Rate 280 of 864 submissions, 32%

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Cited By

Schirner GGerstlauer ADömer R(2017)SCE: System-on-Chip EnvironmentHandbook of Hardware/Software Codesign10.1007/978-94-017-7358-4_31-1(1-32)Online publication date: 10-Apr-2017
https://doi.org/10.1007/978-94-017-7358-4_31-1
Schirner GGerstlauer ADömer R(2017)SCE: System-on-Chip EnvironmentHandbook of Hardware/Software Codesign10.1007/978-94-017-7267-9_31(1019-1050)Online publication date: 27-Sep-2017
https://doi.org/10.1007/978-94-017-7267-9_31
Falk JSchwarzer TZhang LGlaß MTeich J(2015)Automatic communication-driven virtual prototyping and design for networked embedded systemsMicroprocessors & Microsystems10.1016/j.micpro.2015.08.00839:8(1012-1028)Online publication date: 1-Nov-2015
https://dl.acm.org/doi/10.1016/j.micpro.2015.08.008
Mück TFröhlich A(2014)A metaprogrammed C++ framework for hardware/software component integration and communicationJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2014.09.00260:10(816-827)Online publication date: 1-Nov-2014
https://dl.acm.org/doi/10.1016/j.sysarc.2014.09.002

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