research-article

Transaction-friendly condition variables

Authors:

Michael SpearAuthors Info & Claims

SPAA '14: Proceedings of the 26th ACM symposium on Parallelism in algorithms and architectures

Pages 198 - 207

https://doi.org/10.1145/2612669.2612681

Published: 21 June 2014 Publication History

Abstract

Recent microprocessors and compilers have added support for transactional memory (TM). While state-of-the-art TM systems allow the replacement of lock-based critical sections with scalable, optimistic transactions, there is not yet an acceptable mechanism for supporting the use of condition variables in transactions. We introduce a new implementation of condition variables, which uses transactions internally, which can be used from within both transactions and lock-based critical sections, and which is compatible with existing C/C++ interfaces for condition synchronization. By moving most of the mechanism for condition synchronization into user-space, our condition variables have low overhead and permit flexible interfaces that can avoid some of the pitfalls of traditional condition variables. Performance evaluation on an unmodified PARSEC benchmark suite shows equivalent performance to lock-basedcode, and our transactional condition variables also make it possible to replace all locks in PARSEC with transactions.

References

[1]

A.-R. Adl-Tabatabai, T. Shpeisman, and J. Gottschlich. Draft Specification of Transactional Language Constructs for C

[2]

, Feb. 2012. Version 1.1, http://justingottschlich.com/łinebreak{1}tm-specification-for-c-v-1--1/.

[3]

C. Bienia, S. Kumar, J. P. Singh, and K. Li. The PARSEC Benchmark Suite: Characterization and Architectural Implications. In Proceedings of the 17th International Conference on Parallel Architectures and Compilation Techniques, Oct. 2008.

Digital Library

[4]

A. Birrell. Implementing Condition Variables with Semaphores. In Computer Systems, Monographs in Computer Science, pages 29--37. Springer New York, 2004.

[5]

A. Birrell, J. Guttag, J. Horning, and R. Levin. Synchronization Primitives for a Multiprocessor: A Formal Specification. In Proceedings of the 11th ACM Symposium on Operating Systems Principles, Austin, TX, Nov. 1987.

Digital Library

[6]

P. Charles, C. Donawa, K. Ebcioglu, C. Grothoff, A. Kielstra, C. von Praun, V. Saraswat, and V. Sarkar. X10: An Object-Oriented Approach to Non-Uniform Cluster Computing. In Proceedings of the 20th ACM Conference on Object-Oriented Programming, Systems, Languages, and Applications, San Diego, CA, Oct. 2005.

Digital Library

[7]

P. Dudnik and M. M. Swift. Condition Variables and Transactional Memory: Problem or Opportunity? In Proceedings of the 4th ACM SIGPLAN Workshop on Transactional Computing, Raleigh, NC, Feb. 2009.

[8]

T. Harris and K. Fraser. Language Support for Lightweight Transactions. In Proceedings of the 18th ACM Conference on Object-Oriented Programming, Systems, Languages, and Applications, Oct. 2003.

Digital Library

[9]

T. Harris, S. Marlow, S. Peyton Jones, and M. Herlihy. Composable Memory Transactions. In Proceedings of the 10th ACM Symposium on Principles and Practice of Parallel Programming, Chicago, IL, June 2005.

Digital Library

[10]

C. A. R. Hoare. Monitors: An Operating System Structuring Concept. Communications of the ACM, 17(10):549--557, 1974.

Digital Library

[11]

Intel Corp. Intel Architecture Instruction Set Extensions Programming Reference, 319433-012a edition, Feb. 2012.

[12]

C. Jacobi, T. Slegel, and D. Greiner. Transactional Memory Architecture and Implementation for IBM System Z. In Proceedings of the 45th International Symposium On Microarchitecture, Vancouver, BC, Canada, Dec. 2012.

Digital Library

[13]

M. Lesani and J. Palsberg. Communicating Memory Transactions. In Proceedings of the 16th ACM Symposium on Principles and Practice of Parallel Programming, San Antonio, TX, Feb. 2011.

Digital Library

[14]

Y. Liu, S. Diestelhorst, and M. Spear. Delegation and Nesting in Best Effort Hardware Transactional Memory. In Proceedings of the 24th ACM Symposium on Parallelism in Algorithms and Architectures, Pittsburgh, PA, June 2012.

Digital Library

[15]

V. Luchangco and V. Marathe. Revisiting Condition Variables and Transactions. In Proceedings of the 6th ACM SIGPLAN Workshop on Transactional Computing, San Jose, CA, June 2011.

[16]

V. Luchangco and V. Marathe. Transaction Communicators: Enabling Cooperation Among Concurrent Transactions. In Proceedings of the 16th ACM Symposium on Principles and Practice of Parallel Programming, San Antonio, TX, Feb. 2011.

Digital Library

[17]

M. Ringenburg and D. Grossman. AtomCaml: First-Class Atomicity via Rollback. In Proceedings of the 10th ACM International Conference on Functional Programming, Tallinn, Estonia, Sept. 2005.

Digital Library

[18]

W. Ruan, T. Vyas, Y. Liu, and M. Spear. Transactionalizing Legacy Code: An Experience Report Using GCC and Memcached. In Proceedings of the 19th International Conference on Architectural Support for Programming Languages and Operating Systems, Salt Lake City, UT, Mar. 2014.

Digital Library

[19]

W. Scherer and M. Scott. Nonblocking Concurrent Data Structures with Condition Synchronization. In Proceedings of the 18th International Symposium on Distributed Computing, Amsterdam, The Netherlands, Oct. 2004.

[20]

A. Skyrme and N. Rodriguez. From Locks to Transactional Memory: Lessons Learned from Porting a Real-world Application. In Proceedings of the 8th ACM SIGPLAN Workshop on Transactional Computing, Houston, TX, Mar. 2013.

[21]

Y. Smaragdakis, A. Kay, R. Behrends, and M. Young. Transactions with Isolation and Cooperation. In Proceedings of the 22nd ACM Conference on Object Oriented Programming, Systems, Languages, and Applications, Montreal, Quebec, Canada, Oct. 2007.

Digital Library

[22]

M. Spear, L. Dalessandro, V. J. Marathe, and M. L. Scott. A Comprehensive Strategy for Contention Management in Software Transactional Memory. In Proceedings of the 14th ACM Symposium on Principles and Practice of Parallel Programming, Raleigh, NC, Feb. 2009.

Digital Library

[23]

M. Spear, M. Silverman, L. Dalessandro, M. M. Michael, and M. L. Scott. Implementing and Exploiting Inevitability in Software Transactional Memory. In Proceedings of the 37th International Conference on Parallel Processing, Portland, OR, Sept. 2008.

Digital Library

[24]

A. Welc, B. Saha, and A.-R. Adl-Tabatabai. Irrevocable Transactions and their Applications. In Proceedings of the 20th ACM Symposium on Parallelism in Algorithms and Architectures, Munich, Germany, June 2008.

Digital Library

[25]

H. Wettstein. The Problem of Nested Monitor Calls Revisited. SIGOPS Operating Systems Review, 12(1):19--23, Jan. 1978.

Digital Library

Cited By

Sheng YHassan ASpear M(2023)Separating Mechanism from Policy in STM2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT)10.1109/PACT58117.2023.00031(279-296)Online publication date: 21-Oct-2023
https://doi.org/10.1109/PACT58117.2023.00031
Bozkurt E(2022)The usage of cybernetic in complex software systems and its application to the deterministic multithreadingConcurrency and Computation: Practice and Experience10.1002/cpe.737534:28Online publication date: 31-Oct-2022
https://doi.org/10.1002/cpe.7375
Yu ZZuo YZhao Y(2019)Convoider: A Concurrency Bug Avoider Based on Transparent Software Transactional MemoryInternational Journal of Parallel Programming10.1007/s10766-019-00642-1Online publication date: 12-Sep-2019
https://doi.org/10.1007/s10766-019-00642-1
Show More Cited By

Index Terms

Transaction-friendly condition variables
1. Computing methodologies
  1. Parallel computing methodologies
    1. Parallel programming languages
2. Software and its engineering
  1. Software notations and tools
    1. General programming languages
      1. Language types
        Parallel programming languages

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cover image ACM Conferences

SPAA '14: Proceedings of the 26th ACM symposium on Parallelism in algorithms and architectures

June 2014

356 pages

ISBN:9781450328210

DOI:10.1145/2612669

General Chair:
Guy Blelloch
Carnegie Mellon University, USA
,
Program Chair:
Peter Sanders
Karlsruhe Institute of Technology, Germany

Copyright © 2014 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 21 June 2014

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SPAA '14

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SPAA '14: 26th ACM Symposium on Parallelism in Algorithms and Architectures

June 23 - 25, 2014

Prague, Czech Republic

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SPAA '14 Paper Acceptance Rate 30 of 122 submissions, 25%;

Overall Acceptance Rate 447 of 1,461 submissions, 31%

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Cited By

Sheng YHassan ASpear M(2023)Separating Mechanism from Policy in STM2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT)10.1109/PACT58117.2023.00031(279-296)Online publication date: 21-Oct-2023
https://doi.org/10.1109/PACT58117.2023.00031
Bozkurt E(2022)The usage of cybernetic in complex software systems and its application to the deterministic multithreadingConcurrency and Computation: Practice and Experience10.1002/cpe.737534:28Online publication date: 31-Oct-2022
https://doi.org/10.1002/cpe.7375
Yu ZZuo YZhao Y(2019)Convoider: A Concurrency Bug Avoider Based on Transparent Software Transactional MemoryInternational Journal of Parallel Programming10.1007/s10766-019-00642-1Online publication date: 12-Sep-2019
https://doi.org/10.1007/s10766-019-00642-1
Zhou TLuchangco VSpear MScheideler CHajiaghayi M(2017)Brief AnnouncementProceedings of the 29th ACM Symposium on Parallelism in Algorithms and Architectures10.1145/3087556.3087600(371-373)Online publication date: 24-Jul-2017
https://dl.acm.org/doi/10.1145/3087556.3087600
Hung WGarg V(2017)Automatic-Signal Monitors with Multi-object Synchronization2017 IEEE International Parallel and Distributed Processing Symposium (IPDPS)10.1109/IPDPS.2017.57(927-936)Online publication date: May-2017
https://doi.org/10.1109/IPDPS.2017.57
Zhou TZardoshti PSpear M(2017)Practical Experience with Transactional Lock Elision2017 46th International Conference on Parallel Processing (ICPP)10.1109/ICPP.2017.17(81-90)Online publication date: Aug-2017
https://doi.org/10.1109/ICPP.2017.17
Wang CSpear MCadar CPietzuch PKeeton KRodrigues R(2016)Practical condition synchronization for transactional memoryProceedings of the Eleventh European Conference on Computer Systems10.1145/2901318.2901342(1-16)Online publication date: 18-Apr-2016
https://dl.acm.org/doi/10.1145/2901318.2901342
Scott M(2015)Transactional Memory TodayACM SIGACT News10.1145/2789149.278916646:2(96-104)Online publication date: 4-Jun-2015
https://dl.acm.org/doi/10.1145/2789149.2789166
Spear MRuan WLiu YVyas T(2015)Case Study: Using Transactions in MemcachedTransactional Memory. Foundations, Algorithms, Tools, and Applications10.1007/978-3-319-14720-8_20(449-467)Online publication date: 2015
https://doi.org/10.1007/978-3-319-14720-8_20

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