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Hardware/software co-design: VHDL and Ada 95 code migration and integrated analysis

Authors:

Mike Mills,

Greg PetersonAuthors Info & Claims

ACM SIGAda Ada Letters, Volume XVIII, Issue 6

Pages 18 - 27

https://doi.org/10.1145/301687.289528

Published: 01 November 1998 Publication History

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Wenzl MFibich CRossler PTaucher HMatschnig M(2015)Logic synthesis of assertions for saftey-critical applications2015 IEEE International Conference on Industrial Technology (ICIT)10.1109/ICIT.2015.7125322(1581-1586)Online publication date: Mar-2015
https://doi.org/10.1109/ICIT.2015.7125322
Mahani N(2013)Investigating SystemAdaACM SIGAda Ada Letters10.1145/2492312.249233233:1(157-168)Online publication date: 11-Jun-2013
https://dl.acm.org/doi/10.1145/2492312.2492332
Mahani N(2013)Making alive register transfer level and transaction level modeling in AdaACM SIGAda Ada Letters10.1145/2429574.242957632:2(9-16)Online publication date: 16-Jan-2013
https://dl.acm.org/doi/10.1145/2429574.2429576
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Hardware/software co-design: VHDL and Ada 95 code migration and integrated analysis

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Published In

ACM SIGAda Ada Letters Volume XVIII, Issue 6

Nov./Dec. 1998

284 pages

ISSN:1094-3641

DOI:10.1145/301687

Chairmen:
Ed Seidewitz
DHR Technologies
,
William Thomas
MITRE
,
Michael Feldman
The George Washington Univ.

Issue’s Table of Contents

SIGAda '98: Proceedings of the 1998 annual ACM SIGAda international conference on Ada
November 1998
293 pages
ISBN:1581130333
DOI:10.1145/289524
Chairmen:
Ed Seidewitz
DHR Technologies
,
William Thomas
MITRE
,
Michael Feldman
George Washington Univ.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

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Published: 01 November 1998

Published in SIGADA Volume XVIII, Issue 6

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Wenzl MFibich CRossler PTaucher HMatschnig M(2015)Logic synthesis of assertions for saftey-critical applications2015 IEEE International Conference on Industrial Technology (ICIT)10.1109/ICIT.2015.7125322(1581-1586)Online publication date: Mar-2015
https://doi.org/10.1109/ICIT.2015.7125322
Mahani N(2013)Investigating SystemAdaACM SIGAda Ada Letters10.1145/2492312.249233233:1(157-168)Online publication date: 11-Jun-2013
https://dl.acm.org/doi/10.1145/2492312.2492332
Mahani N(2013)Making alive register transfer level and transaction level modeling in AdaACM SIGAda Ada Letters10.1145/2429574.242957632:2(9-16)Online publication date: 16-Jan-2013
https://dl.acm.org/doi/10.1145/2429574.2429576
Mahani N(2012)Making alive register transfer level and transaction level modeling in AdaACM SIGAda Ada Letters10.1145/2148436.214843931:2(15-22)Online publication date: 22-Feb-2012
https://dl.acm.org/doi/10.1145/2148436.2148439
Leif R(1999)SIGda '96, workshopACM SIGAda Ada Letters10.1145/311457.311463XIX:1(28-39)Online publication date: 1-Mar-1999
https://dl.acm.org/doi/10.1145/311457.311463

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Virtualizable hardware/software design infrastructure for dynamically partially reconfigurable systems

Hardware-software co-design of AES on FPGA

Hardware/software co-design for particle swarm optimization algorithm

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