Article

Free access

A multiscale method for fast capacitance extraction

Authors:

Johannes Tausch,

Jacob WhiteAuthors Info & Claims

DAC '99: Proceedings of the 36th annual ACM/IEEE Design Automation Conference

Pages 537 - 542

https://doi.org/10.1145/309847.309994

Published: 01 June 1999 Publication History

PDF eReader

References

[1]

W. Shi, J. Liu, N. Kakani, and T. Yu, A Fast Hierarchical Algorithm for 3-D Capacitance Extraction Proceeding of the 29th Design Automation Conference, San Francisco, CA, June, 1997, pp. 212-217.

Digital Library

Google Scholar

[2]

V. Veremey and R. Mittra, A Technique for Fast Calculation Of Capacitance Matrices of Interconnect Structures I17,17,17, Transactions of Components, Packaging, and Manufacturing Technology, Part B: Advanced Packaging, Vol 21, No 3, pp. 241-249.

Google Scholar

[3]

W. Hong, W. K. Sun, Z. H. Zhu, H. Ji, B. Song, and W. Dai, A Novel Dimension-Reduction Technique for the Capacitance Extraction of 3-D VLSI Interconnects MTT, Vol. 46, No. 8, pp 1037-1044.

Google Scholar

[4]

J.R. Phillips and J. K. White, "A Precorrected-FFT method for Electrostatic Analysis of Complicated 3-D Structures," IEEE Trans. on Computer-Aided Design, October 1997, Vol. 16, No. 10, pp. 1059-1072.

Digital Library

Google Scholar

[5]

S. Kapur and J. Zhao,"A fast method of moments solver for efficient parameter extraction of MCMs" Design Automation Conference, 1997 pp. 141-146.

Digital Library

Google Scholar

[6]

G. Beylkin, R. Coifman, and V. Rohklin. Fast wavelet transforms and numerical algorithms. Comm. Pure Appl. Math., XLIV: 141-183, 1991.

Crossref

Google Scholar

[7]

K. Nabors and J. White, "FastCap: A Multipole-Accelerated 3-D Capacitance Extraction Program," IEEE Transactions on Computer-Aided Design, vol. 10 no. 10, November 1991, p1447-1459.

Digital Library

Google Scholar

[8]

R.F. Harrington, Field Computation by Moment Methods. New York: MacMillan, 1968.

Digital Library

Google Scholar

[9]

A. E. Ruehli and E A. Brennan, "Efficient capacitance calculations for three-dimensional multiconductor systems," MTT, vol. 21, pp. 76-82, February 1973.

Crossref

Google Scholar

[10]

Y. L. Le Coz and R. B. Iverson, "A stochastic algorithm for high speed capacitance extraction in integrated circuits," Solid State Electronics, vol. 35, no. 7, pp. 1005-1012, 1992.

Crossref

Google Scholar

[11]

Lesslie Greengard. The Rapid Evaluation of Potential Fields in Particle Systems. MIT Press, Cambridge, Massachusetts, 1988.

Crossref

Google Scholar

[12]

Harry Yserentant. On the multi-level splitting of finite element spaces. Nume~: Math., 49:379-412, 1986.

Digital Library

Google Scholar

[13]

K. Nabors, F. T. Korsmeyer, F. T. Leighton, and J. White. Preconditioned, adaptive, multipole-accelerated iterative methods for three-dimensional first-kind integral equations of potential theory. SIAM J. Sci. Statist. Comput., 15(3):713-735, 1994.

Digital Library

Google Scholar

Cited By

View all

Yu WWang XYu WWang X(2014)Statistical Capacitance Extraction Based on Continuous-Surface Geometric ModelAdvanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_9(153-178)Online publication date: 12-Mar-2014
https://doi.org/10.1007/978-3-642-54298-5_9
Yu WWang XYu WWang X(2014)Process Variation-Aware Capacitance ExtractionAdvanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_8(121-152)Online publication date: 12-Mar-2014
https://doi.org/10.1007/978-3-642-54298-5_8
Yu WWang XYu WWang X(2014)Extracting Frequency-Dependent Substrate ParasiticsAdvanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_7(107-119)Online publication date: 12-Mar-2014
https://doi.org/10.1007/978-3-642-54298-5_7
Show More Cited By

Index Terms

A multiscale method for fast capacitance extraction
1. Applied computing
  1. Physical sciences and engineering

Recommendations

Fast capacitance extraction in multilayer, conformal and embedded dielectric using hybrid boundary element method
DAC '07: Proceedings of the 44th annual Design Automation Conference

In modern VLSI circuits, metal conductors are separated by multiple planar, conformal or embedded dielectric media. Previous algorithms based on Boundary Element Method (BEM) are inefficient to extract interconnect capacitance due to the complex ...
3-D-TCAD-Based Parasitic Capacitance Extraction for Emerging Multigate Devices and Circuits

In recent years, the multigate field-effect transistor (FET) has emerged as the most viable contender for technology scaling down to the sub-10-nm nodes. The nonplanar nature of multigate devices, along with rapidly shrinking front-end-of-line (FEOL) ...
New multipole method for 3-D capacitance extraction
Abstract
This paper describes an efficient improvement of the multipole accelerated boundary element method for 3-D capacitance extraction. The overall relations between the position of 2-D boundary elements are considered instead of only the relations ...

Comments

Information & Contributors

Information

Published In

DAC '99: Proceedings of the 36th annual ACM/IEEE Design Automation Conference

June 1999

1000 pages

ISBN:1581131097

DOI:10.1145/309847

Editor:
Mary Jane Irwin

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 June 1999

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Qualifiers

Article

Conference

DAC99

Sponsor:

EDAC
SIGDA
IEEE-CAS

DAC99: The 36th ACM/IEEE-CAS/EDAC Design Automation Conference

June 21 - 25, 1999

Louisiana, New Orleans, USA

Acceptance Rates

DAC '99 Paper Acceptance Rate 154 of 451 submissions, 34%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

Upcoming Conference

DAC '25

Sponsor:
sigda

62nd ACM/IEEE Design Automation Conference

June 22 - 26, 2025

San Francisco , CA , USA

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

26
Total Citations
View Citations
339
Total Downloads

Downloads (Last 12 months)29
Downloads (Last 6 weeks)7

Reflects downloads up to 08 Feb 2025

Other Metrics

View Author Metrics

Citations

Cited By

View all

Yu WWang XYu WWang X(2014)Statistical Capacitance Extraction Based on Continuous-Surface Geometric ModelAdvanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_9(153-178)Online publication date: 12-Mar-2014
https://doi.org/10.1007/978-3-642-54298-5_9
Yu WWang XYu WWang X(2014)Process Variation-Aware Capacitance ExtractionAdvanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_8(121-152)Online publication date: 12-Mar-2014
https://doi.org/10.1007/978-3-642-54298-5_8
Yu WWang XYu WWang X(2014)Extracting Frequency-Dependent Substrate ParasiticsAdvanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_7(107-119)Online publication date: 12-Mar-2014
https://doi.org/10.1007/978-3-642-54298-5_7
Yu WWang XYu WWang X(2014)Substrate Resistance Extraction with Boundary Element MethodAdvanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_6(91-106)Online publication date: 12-Mar-2014
https://doi.org/10.1007/978-3-642-54298-5_6
Yu WWang XYu WWang X(2014)Resistance Extraction of Complex 3-D InterconnectsAdvanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_5(71-89)Online publication date: 12-Mar-2014
https://doi.org/10.1007/978-3-642-54298-5_5
Yu WWang XYu WWang X(2014)Fast Boundary Element Methods for Capacitance Extraction (II)Advanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_4(39-70)Online publication date: 12-Mar-2014
https://doi.org/10.1007/978-3-642-54298-5_4
Yu WWang XYu WWang X(2014)Fast Boundary Element Methods for Capacitance Extraction (I)Advanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_3(19-37)Online publication date: 12-Mar-2014
https://doi.org/10.1007/978-3-642-54298-5_3
Yu WWang XYu WWang X(2014)Basic Field-Solver Techniques for RC ExtractionAdvanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_2(7-18)Online publication date: 12-Mar-2014
https://doi.org/10.1007/978-3-642-54298-5_2
Yu WWang XYu WWang X(2014)FRW-Based Solver for Chip-Scale Large StructuresAdvanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_11(209-231)Online publication date: 12-Mar-2014
https://doi.org/10.1007/978-3-642-54298-5_11
Yu WWang XYu WWang X(2014)Fast Floating Random Walk Method for Capacitance ExtractionAdvanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_10(179-208)Online publication date: 12-Mar-2014
https://doi.org/10.1007/978-3-642-54298-5_10
Show More Cited By

View Options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Cited By

Index Terms

Recommendations

Fast capacitance extraction in multilayer, conformal and embedded dielectric using hybrid boundary element method

3-D-TCAD-Based Parasitic Capacitance Extraction for Emerging Multigate Devices and Circuits

New multipole method for 3-D capacitance extraction