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Rapid development of optimized DSP code from a high level description through software estimations

Published: 01 June 1999 Publication History
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References

[1]
Edward A. LEE. Programmable DSP Architectures: Part 1. IEEE ASSP Magazine, October 1988.
[2]
Vojin Zivovjnovic et al. DSP Processor/Compiler Co-Design: A Quantitative Approach. Prec. ICSPAT, pp. 679-683, Boston, MA, USA, October 7-10, 1996.
[3]
Guido ARAUJO and Sharad MALIK, Code Generation for Fixed-Point DSPs. ACM Transactions on Design Automation of Electronics Systems, Vol. 3, No 3, July 1998.
[4]
C. Liem, P. Paulin and A. Jerraya, Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures, 33rd DAC, Las Vegas, Nevada, June 3-7, 1996.
[5]
VVF3500 C Compiler. Revision 1.0. Getting Started With the OakDSPCore C Compiler. VLSI Technology, 1996.
[6]
S. Malik et al. Static Timing Analysis Of Embedded Software, 34th DAC, pp. 147-152, Anaheim, CA, 1997.
[7]
Marc SOLER et al. An Embedded DSP Platform for multistandard ITU G.728, G.729 and G.723.1 audio compression. Prec. ICSPAT, Boston, MA, October 7-10, 1996.
[8]
Jie Gong et al. Software Estimation from Executable Specifications, Technical Report ICS-93-5, March 8, 1993.
[9]
Rizos Sakellariou et al. Efficient Implementation of the ROW-Column 8x8 IDCT on VL1W Architectures, EUSIPCO, Vol. 2, pp. 869-872, Greece, Sept. 7-11, 1998.
[10]
Recommendation G.721, 32 kbit/s Adaptative Differential Pulse Code Modulation, ITU (1984).
[11]
Recommendation G.728, Coding of Speech at 16 kbit/s using Low-Delay Code Excited Linear Prediction, ITU (1994).
[12]
C. Liem et al., Industrial Experience using Rule-Driven Retargetable Code Generation for Multimedia Applications, 8th Symposium on System Level Synthesis, September 1995.
[13]
G. Goossens et al, Embedded Software in Real-Time Signal Processing Systems: Design Technologies, Proceedings of the IEEE, Vol. 85, No. 3, March 1997.
[14]
J-H Yang et al., MetaCore: An Application Specific DSP Development System, 35th DAC, pp. 800-803, CA, 1998.

Cited By

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  • (2011)Hardware/Software Co-reconfigurable Instruction Decoder for Adaptive Multi-core DSP ArchitecturesJournal of Signal Processing Systems10.1007/s11265-010-0461-162:3(273-285)Online publication date: 1-Mar-2011
  • (2010)Combining Target-independent Analysis with Dynamic Profiling to Build the Performance Model of a DSPProceedings of the 2010 10th IEEE International Conference on Computer and Information Technology10.1109/CIT.2010.324(1895-1901)Online publication date: 29-Jun-2010
  • (2006)Floating-to-fixed-point conversion for digital signal processorsEURASIP Journal on Advances in Signal Processing10.1155/ASP/2006/964212006(77-77)Online publication date: 1-Jan-2006
  • Show More Cited By

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cover image ACM Conferences
DAC '99: Proceedings of the 36th annual ACM/IEEE Design Automation Conference
June 1999
1000 pages
ISBN:1581131097
DOI:10.1145/309847
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 01 June 1999

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Author Tags

  1. DSP
  2. code generation
  3. performance estimation

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DAC99
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DAC99: The 36th ACM/IEEE-CAS/EDAC Design Automation Conference
June 21 - 25, 1999
Louisiana, New Orleans, USA

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DAC '99 Paper Acceptance Rate 154 of 451 submissions, 34%;
Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

View all
  • (2011)Hardware/Software Co-reconfigurable Instruction Decoder for Adaptive Multi-core DSP ArchitecturesJournal of Signal Processing Systems10.1007/s11265-010-0461-162:3(273-285)Online publication date: 1-Mar-2011
  • (2010)Combining Target-independent Analysis with Dynamic Profiling to Build the Performance Model of a DSPProceedings of the 2010 10th IEEE International Conference on Computer and Information Technology10.1109/CIT.2010.324(1895-1901)Online publication date: 29-Jun-2010
  • (2006)Floating-to-fixed-point conversion for digital signal processorsEURASIP Journal on Advances in Signal Processing10.1155/ASP/2006/964212006(77-77)Online publication date: 1-Jan-2006
  • (2004)DSP Code Generation with Optimized Data Word-Length SelectionSoftware and Compilers for Embedded Systems10.1007/978-3-540-30113-4_16(214-228)Online publication date: 2004
  • (2002)Power Consumption Model for the DSP OAK ProcessorSOC Design Methodologies10.1007/978-0-387-35597-9_19(217-228)Online publication date: 2002

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