research-article

Best of Both Worlds: Integration of Split Manufacturing and Camouflaging into a Security-Driven CAD Flow for 3D ICs

Authors:

Satwik Patnaik,

Mohammed Ashraf,

Ozgur Sinanoglu,

Johann KnechtelAuthors Info & Claims

2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

Pages 1 - 8

https://doi.org/10.1145/3240765.3240784

Published: 05 November 2018 Publication History

Abstract

With the globalization of manufacturing and supply chains, ensuring the security and trustworthiness of ICs has become an urgent challenge. Split manufacturing (SM) and layout camouflaging (LC) are promising techniques to protect the intellectual property (IP) of ICs from malicious entities during and after manufacturing (i.e., from untrusted foundries and reverse-engineering by end-users). In this paper, we strive for “the best of both worlds,” that is of SM and LC. To do so, we extend both techniques towards 3D integration, an up-and-coming design and manufacturing paradigm based on stacking and interconnecting of multiple chips/dies/tiers. Initially, we review prior art and their limitations. We also put forward a novel, practical threat model of IP piracy which is in line with the business models of present-day design houses. Next, we discuss how 3D integration is a naturally strong match to combine SM and LC. We propose a security-driven CAD and manufacturing flow for face-to-face (F2F) 3D ICs, along with obfuscation of interconnects. Based on this CAD flow, we conduct comprehensive experiments on DRC-clean layouts. Strengthened by an extensive security analysis (also based on a novel attack to recover obfuscated F2F interconnects), we argue that entering the next, third dimension is eminent for effective and efficient IP protection.

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Cited By

Hu YZhang YYang KChen DBeerel PNuzzo P(2023)On the Security of Sequential Logic Locking Against Oracle-Guided AttacksIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.325342842:11(3628-3641)Online publication date: Nov-2023
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Rangarajan NPatnaik SKnechtel JKarri RSinanoglu ORakheja S(2022) Opening the Doors to Dynamic Camouflaging: Harnessing the Power of Polymorphic Devices IEEE Transactions on Emerging Topics in Computing10.1109/TETC.2020.299113410:1(137-156)Online publication date: 1-Jan-2022
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Best of Both Worlds: Integration of Split Manufacturing and Camouflaging into a Security-Driven CAD Flow for 3D ICs

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2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

Nov 2018

939 pages

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Published: 05 November 2018

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Cited By

Hu YZhang YYang KChen DBeerel PNuzzo P(2023)On the Security of Sequential Logic Locking Against Oracle-Guided AttacksIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.325342842:11(3628-3641)Online publication date: Nov-2023
https://doi.org/10.1109/TCAD.2023.3253428
Rangarajan NPatnaik SKnechtel JKarri RSinanoglu ORakheja S(2022) Opening the Doors to Dynamic Camouflaging: Harnessing the Power of Polymorphic Devices IEEE Transactions on Emerging Topics in Computing10.1109/TETC.2020.299113410:1(137-156)Online publication date: 1-Jan-2022
https://doi.org/10.1109/TETC.2020.2991134
Patnaik SAshraf MLi HKnechtel JSinanoglu O(2022)Concerted Wire Lifting: Enabling Secure and Cost-Effective Split ManufacturingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2021.305637941:2(266-280)Online publication date: Feb-2022
https://doi.org/10.1109/TCAD.2021.3056379
Knechtel JLienig JBehjat LYang S(2021)Hardware Security for and beyond CMOS TechnologyProceedings of the 2021 International Symposium on Physical Design10.1145/3439706.3446902(115-126)Online publication date: 22-Mar-2021
https://dl.acm.org/doi/10.1145/3439706.3446902
Patnaik SAshraf MSinanoglu OKnechtel J(2021)A Modern Approach to IP Protection and Trojan Prevention: Split Manufacturing for 3D ICs and Obfuscation of Vertical InterconnectsIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2019.29335729:4(1815-1834)Online publication date: 1-Oct-2021
https://doi.org/10.1109/TETC.2019.2933572
Kabir MPeng Y(2021)Holistic Chiplet–Package Co-Optimization for Agile Custom 2.5-D DesignIEEE Transactions on Components, Packaging and Manufacturing Technology10.1109/TCPMT.2021.306972411:5(715-726)Online publication date: May-2021
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Hu WChang CSengupta ABhunia SKastner RLi H(2021)An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design ToolsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.304797640:6(1010-1038)Online publication date: Jun-2021
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Hu YZhang YYang KChen DBeerel PNuzzo P(2021)Fun-SAT: Functional Corruptibility-Guided SAT-Based Attack on Sequential Logic Encryption2021 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)10.1109/HOST49136.2021.9702267(281-291)Online publication date: 12-Dec-2021
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Vemuri RChen SVemuri RChen S(2021)Defenses Against Satisfiability Based AttacksSplit Manufacturing of Integrated Circuits for Hardware Security and Trust10.1007/978-3-030-73445-9_5(137-169)Online publication date: 13-Mar-2021
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Raparti VPasricha S(2021)Securing 3D NoCs from Hardware Trojan AttacksNetwork-on-Chip Security and Privacy10.1007/978-3-030-69131-8_17(461-479)Online publication date: 4-May-2021
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