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Incorporating multi-pass attribute grammars for the high-level synthesis of ASICs

Authors:

George Economakos,

George Papakostantinou,

Panayotis TsankasAuthors Info & Claims

SAC '98: Proceedings of the 1998 ACM symposium on Applied Computing

Pages 45 - 49

https://doi.org/10.1145/330560.330568

Published: 27 February 1998 Publication History

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Cited By

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Economakos GOikonomakos PPoulakis IPapakonstantinou GGeorgoulis S(2018)Handling advanced scheduling heuristics under a hardware compiler generation environmentKnowledge-Based Systems10.1016/S0950-7051(01)00116-215:1-2(3-11)Online publication date: 31-Dec-2018
https://dl.acm.org/doi/10.1016/S0950-7051%2801%2900116-2
Economakos GPapakonstantinou G(2003)Refinement and Property Checking in High-Level Synthesis Using Attribute GrammarsCorrect Hardware Design and Verification Methods10.1007/3-540-48153-2_27(330-333)Online publication date: 3-Jun-2003
https://doi.org/10.1007/3-540-48153-2_27
Economakos GPapakonstantinou G(1999)A formal method for hardware design using attribute grammarsICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357)10.1109/ICECS.1999.812266(233-236)Online publication date: 1999
https://doi.org/10.1109/ICECS.1999.812266
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SAC '98: Proceedings of the 1998 ACM symposium on Applied Computing

February 1998

778 pages

ISBN:0897919696

DOI:10.1145/330560

Chairmen:
K. M. George
Oklahoma State Univ.
,
Gary B. Lamong
Air Force Institute of Technology, Dayton, OH

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 27 February 1998

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February 27 - March 1, 1998

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Economakos GOikonomakos PPoulakis IPapakonstantinou GGeorgoulis S(2018)Handling advanced scheduling heuristics under a hardware compiler generation environmentKnowledge-Based Systems10.1016/S0950-7051(01)00116-215:1-2(3-11)Online publication date: 31-Dec-2018
https://dl.acm.org/doi/10.1016/S0950-7051%2801%2900116-2
Economakos GPapakonstantinou G(2003)Refinement and Property Checking in High-Level Synthesis Using Attribute GrammarsCorrect Hardware Design and Verification Methods10.1007/3-540-48153-2_27(330-333)Online publication date: 3-Jun-2003
https://doi.org/10.1007/3-540-48153-2_27
Economakos GPapakonstantinou G(1999)A formal method for hardware design using attribute grammarsICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357)10.1109/ICECS.1999.812266(233-236)Online publication date: 1999
https://doi.org/10.1109/ICECS.1999.812266
Economakos GPapakonstantinou G(1999)Language based design verification with semantic analysisProceedings 25th EUROMICRO Conference. Informatics: Theory and Practice for the New Millennium10.1109/EURMIC.1999.794479(268-275 vol.1)Online publication date: 1999
https://doi.org/10.1109/EURMIC.1999.794479
Economakos GPapakonstantinou G(1999)An Attribute Grammar Driven High-Level Synthesis Paradigm for Control ApplicationsAdvances in Intelligent Systems10.1007/978-94-011-4840-5_5(51-62)Online publication date: 1999
https://doi.org/10.1007/978-94-011-4840-5_5
Economakos GPapakonstantinou G(1998)Exploiting the use of VHDL specifications in the AGENDA high-level synthesis environmentProceedings. 24th EUROMICRO Conference (Cat. No.98EX204)10.1109/EURMIC.1998.711782(91-98)Online publication date: 1998
https://doi.org/10.1109/EURMIC.1998.711782

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Layout-driven RTL binding techniques for high-level synthesis

Automating the Design of Processor/Accelerator Embedded Systems with LegUp High-Level Synthesis

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Layout-driven RTL binding techniques for high-level synthesis

Automating the Design of Processor/Accelerator Embedded Systems with LegUp High-Level Synthesis

An Introduction to High-Level Synthesis

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