research-article

Verifying x86 instruction implementations

Authors:

Anna Slobodova,

Sol SwordsAuthors Info & Claims

CPP 2020: Proceedings of the 9th ACM SIGPLAN International Conference on Certified Programs and Proofs

Pages 47 - 60

https://doi.org/10.1145/3372885.3373811

Published: 22 January 2020 Publication History

Abstract

Verification of modern microprocessors is a complex task that requires a substantial allocation of resources. Despite significant progress in formal verification, the goal of complete verification of an industrial design has not been achieved. In this paper, we describe a current contribution of formal methods to the validation of modern x86 microprocessors at Centaur Technology. We focus on proving correctness of instruction implementations, which includes the decoding of an instruction, its translation into a sequence of micro-operations, any subsequent execution of traps to microcode ROM, and the implementation of these micro-operations in execution units. All these tasks are performed within one verification framework, which includes a theorem prover, a verified symbolic simulator, and SAT solvers. We describe the work of defining the needed formal models for both the architecture and micro-architecture in this framework, as well as tools for decomposing the requisite properties into smaller lemmas which can be automatically checked. We additionally cover the advantages and limitations of our approach. To our knowledge, there are no similar results in the verification of implementations of an x86 microprocessor.

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Cited By

Weingarten LDatta KKole ADrechsler R(2024)Complete and Efficient Verification for a RISC-V Processor Using Formal Verification2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE58400.2024.10546693(1-6)Online publication date: 25-Mar-2024
https://doi.org/10.23919/DATE58400.2024.10546693
Lu JYuan SSanan DZhao Y(2024)Formalizing x86-64 ISA in Isabelle/HOL: A Binary Semantics for eBPF JIT CorrectnessDependable Software Engineering. Theories, Tools, and Applications10.1007/978-981-96-0602-3_11(197-216)Online publication date: 25-Nov-2024
https://doi.org/10.1007/978-981-96-0602-3_11
Wang GZhu ZCheng XMeng D(2023)A High-Coverage and Efficient Instruction-Level Testing Approach for x86 ProcessorsIEEE Transactions on Computers10.1109/TC.2023.328876272:11(3203-3217)Online publication date: 1-Nov-2023
https://dl.acm.org/doi/10.1109/TC.2023.3288762
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Index Terms

Verifying x86 instruction implementations
1. Hardware
  1. Hardware validation
    1. Functional verification
      1. Theorem proving and SAT solving

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cover image ACM Conferences

CPP 2020: Proceedings of the 9th ACM SIGPLAN International Conference on Certified Programs and Proofs

January 2020

381 pages

ISBN:9781450370974

DOI:10.1145/3372885

Program Chairs:
Jasmin Blanchette
Universiteit Amsterdam, Netherlands
,
Cătălin Hriţcu
Inria, France

Copyright © 2020 ACM.

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Published: 22 January 2020

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Cited By

Weingarten LDatta KKole ADrechsler R(2024)Complete and Efficient Verification for a RISC-V Processor Using Formal Verification2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE58400.2024.10546693(1-6)Online publication date: 25-Mar-2024
https://doi.org/10.23919/DATE58400.2024.10546693
Lu JYuan SSanan DZhao Y(2024)Formalizing x86-64 ISA in Isabelle/HOL: A Binary Semantics for eBPF JIT CorrectnessDependable Software Engineering. Theories, Tools, and Applications10.1007/978-981-96-0602-3_11(197-216)Online publication date: 25-Nov-2024
https://doi.org/10.1007/978-981-96-0602-3_11
Wang GZhu ZCheng XMeng D(2023)A High-Coverage and Efficient Instruction-Level Testing Approach for x86 ProcessorsIEEE Transactions on Computers10.1109/TC.2023.328876272:11(3203-3217)Online publication date: 1-Nov-2023
https://dl.acm.org/doi/10.1109/TC.2023.3288762
Weingarten LMahzoon AGoli MDrechsler R(2023)Polynomial Formal Verification of a Processor: A RISC-V Case Study2023 24th International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED57927.2023.10129397(1-7)Online publication date: 5-Apr-2023
https://doi.org/10.1109/ISQED57927.2023.10129397
Zhang YSang SLuan YZhu X(2022)Application of Emu8086 in Digital Teaching Mode of Microcomputer Principle and Interface TechnologyInternational Journal of Education and Humanities10.54097/ijeh.v6i1.30836:1(158-161)Online publication date: 27-Nov-2022
https://doi.org/10.54097/ijeh.v6i1.3083
Avigad JGoldberg LLevit DSeginer YTitelman APopescu AZdancewic S(2022)A verified algebraic representation of cairo program executionProceedings of the 11th ACM SIGPLAN International Conference on Certified Programs and Proofs10.1145/3497775.3503675(153-165)Online publication date: 17-Jan-2022
https://dl.acm.org/doi/10.1145/3497775.3503675
Carneiro M(2020)Metamath Zero: Designing a Theorem Prover ProverIntelligent Computer Mathematics10.1007/978-3-030-53518-6_5(71-88)Online publication date: 17-Jul-2020
https://doi.org/10.1007/978-3-030-53518-6_5

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