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Cooperative Software-hardware Acceleration of K-means on a Tightly Coupled CPU-FPGA System

Published: 17 August 2020 Publication History

Abstract

We consider software-hardware acceleration of K-means clustering on the Intel Xeon+FPGA platform. We design a pipelined accelerator for K-means and combine it with CPU threads to assess performance benefits of (1) acceleration when data are only accessed from system memory and (2) cooperative CPU-FPGA acceleration. Our evaluation shows that the accelerator is up to 12.7×/2.4× faster than a single CPU thread for the assignment/update step of K-means. The cooperative use of threads and FPGA is roughly 1.9× faster than CPU threads alone or the FPGA by itself. Our approach delivers 4×–5× higher throughput compared to existing offload processing approaches.

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  • (2024)Design and performance analysis of modern computational storage devices: A systematic reviewExpert Systems with Applications10.1016/j.eswa.2024.123570250(123570)Online publication date: Sep-2024
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  • (2023)Hardware Software Co-design of k-means Clustering Algorithm2023 9th International Conference on Signal Processing and Communication (ICSC)10.1109/ICSC60394.2023.10441233(688-693)Online publication date: 21-Dec-2023
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Published In

cover image ACM Transactions on Architecture and Code Optimization
ACM Transactions on Architecture and Code Optimization  Volume 17, Issue 3
September 2020
200 pages
ISSN:1544-3566
EISSN:1544-3973
DOI:10.1145/3415154
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Publication History

Published: 17 August 2020
Accepted: 01 June 2020
Revised: 01 March 2020
Received: 01 February 2020
Published in TACO Volume 17, Issue 3

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Author Tags

  1. FPGA-based acceleration
  2. Heterogeneous acceleration
  3. K-Means clustering
  4. Performance evaluation
  5. shared-memory CPU-FPGA systems

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Cited By

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  • (2024)Design and performance analysis of modern computational storage devices: A systematic reviewExpert Systems with Applications10.1016/j.eswa.2024.123570250(123570)Online publication date: Sep-2024
  • (2023)A Comprehensive Memory Management Framework for CPU-FPGA Heterogenous SoCsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.317932342:4(1058-1071)Online publication date: 1-Apr-2023
  • (2023)Hardware Software Co-design of k-means Clustering Algorithm2023 9th International Conference on Signal Processing and Communication (ICSC)10.1109/ICSC60394.2023.10441233(688-693)Online publication date: 21-Dec-2023
  • (2021)HCE: A Runtime System for Efficiently Supporting Heterogeneous Cooperative ExecutionIEEE Access10.1109/ACCESS.2021.31248569(147264-147279)Online publication date: 2021
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