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A power reduction technique with object code merging for application specific embedded processors

Authors:

Tohru Ishihara,

Hiroto YasuuraAuthors Info & Claims

DATE '00: Proceedings of the conference on Design, automation and test in Europe

Pages 617 - 623

https://doi.org/10.1145/343647.343871

Published: 01 January 2000 Publication History

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Cited By

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Artes AAyala JHuisken JCatthoor F(2013)Survey of Low-Energy Techniques for Instruction Memory Organisations in Embedded SystemsJournal of Signal Processing Systems10.1007/s11265-012-0694-270:1(1-19)Online publication date: 1-Jan-2013
https://dl.acm.org/doi/10.1007/s11265-012-0694-2
Yasuura HIshihara TMuroyama M(2007)Energy Management Techniques for SOC DesignEssential Issues in SOC Design10.1007/1-4020-5352-5_6(177-223)Online publication date: 2007
https://doi.org/10.1007/1-4020-5352-5_6
Bouyssounouse BSifakis J(2005)Low power engineeringEmbedded Systems Design10.5555/2137690.2137724(450-478)Online publication date: 1-Jan-2005
https://dl.acm.org/doi/10.5555/2137690.2137724
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A power reduction technique with object code merging for application specific embedded processors

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DATE '00: Proceedings of the conference on Design, automation and test in Europe

January 2000

707 pages

ISBN:1581132441

DOI:10.1145/343647

Chairman:
Ivo Bolsens
IMEC, Leuven, Belgium

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 01 January 2000

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DATE00: Design Automation and Test in Europe

March 27 - 30, 2000

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Artes AAyala JHuisken JCatthoor F(2013)Survey of Low-Energy Techniques for Instruction Memory Organisations in Embedded SystemsJournal of Signal Processing Systems10.1007/s11265-012-0694-270:1(1-19)Online publication date: 1-Jan-2013
https://dl.acm.org/doi/10.1007/s11265-012-0694-2
Yasuura HIshihara TMuroyama M(2007)Energy Management Techniques for SOC DesignEssential Issues in SOC Design10.1007/1-4020-5352-5_6(177-223)Online publication date: 2007
https://doi.org/10.1007/1-4020-5352-5_6
Bouyssounouse BSifakis J(2005)Low power engineeringEmbedded Systems Design10.5555/2137690.2137724(450-478)Online publication date: 1-Jan-2005
https://dl.acm.org/doi/10.5555/2137690.2137724
Aa TJayapala MBarat FDeconinck GLauwereins RCorporaal HCatthoor F(2005)Instruction buffering exploration for low energy embedded processorsJournal of Embedded Computing10.5555/1233748.12337531:3(341-351)Online publication date: 1-Aug-2005
https://dl.acm.org/doi/10.5555/1233748.1233753
Jayapala MBarat FVander Aa TCatthoor FCorporaal HDeconinck G(2005)Clustered Loop Buffer Organization for Low Energy VLIW Embedded ProcessorsIEEE Transactions on Computers10.1109/TC.2005.9254:6(672-683)Online publication date: 1-Jun-2005
https://dl.acm.org/doi/10.1109/TC.2005.92
Gordon-Ross AVahid F(2005)Frequent Loop Detection Using Efficient Nonintrusive On-Chip HardwareIEEE Transactions on Computers10.1109/TC.2005.16554:10(1203-1215)Online publication date: 1-Oct-2005
https://dl.acm.org/doi/10.1109/TC.2005.165
Bouyssounouse BSifakis JBouyssounouse BSifakis J(2005)Low Power EngineeringEmbedded Systems Design10.1007/978-3-540-31973-3_30(450-478)Online publication date: 2005
https://doi.org/10.1007/978-3-540-31973-3_30
Gordon-Ross AVahid FMoreno JMurthy PConte TFaraboschi P(2003)Frequent loop detection using efficient non-intrusive on-chip hardwareProceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems10.1145/951710.951728(117-124)Online publication date: 30-Oct-2003
https://dl.acm.org/doi/10.1145/951710.951728
Gordon-Ross ACotterell SVahid F(2003)Tiny instruction caches for low power embedded systemsACM Transactions on Embedded Computing Systems10.1145/950162.9501632:4(449-481)Online publication date: 1-Nov-2003
https://dl.acm.org/doi/10.1145/950162.950163
Carro LCorrea ECardozo RMoraes FBampi S(2003)Exploiting reconfigurability for low-power control of embedded processorsProceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.10.1109/ISCAS.2003.1206303(V-421-V-424)Online publication date: 2003
https://doi.org/10.1109/ISCAS.2003.1206303
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Retargetable code generation for application-specific processors

Automatic custom instruction identification for application-specific instruction set processors

Dynamic configuration of application-specific implicit instructions for embedded pipelined processors

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Retargetable code generation for application-specific processors

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Dynamic configuration of application-specific implicit instructions for embedded pipelined processors

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