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A PMS level language for performance evaluation modelling (V-PMS)

Published: 17 January 1976 Publication History
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  • Abstract

    A comparison of Register Transfer level modelling and V-PMS is quite indicative. While RT-modelling approaches a restricted goal, viz. a hardware structure capable of performing a few hundred algorithms, a V-PMS level model has a complete computer system as its target, i.e. a composite of hardware structures of the RT-level complexity cooperating under the control of an operating system in the execution of a load.
    In order to construct a language suitable for describing the hardware as part of a total PMS-level model for performance evaluation, the original form of PMS was substantially changed by providing an expanded set of building blocks with corresponding definitions. This language, with its clearly defined functions and performance data, its unambiguous communication blocks and rules for interconnections, provides a human reader with a clear understanding of the performance of components and of their internal communication within the computer system, and links the hardware part to a model of an operating system (to be supplied at a later time). For computer readable system specification a syntax for connecting the above symbolic components is proposed. A description of the CDC Cyber 74/CDC 6600 system examplifies the use of the proposed language and its merits for building performance evaluation models.

    References

    [1]
    Su, S.Y.H., A Survey of Digital Hardware Descriptive Languages; Proc. of the Workshop on Hardware Descriptive Languages. pp 144, 1974
    [2]
    Bell, G. and Newell, A. Computer Structures: Readings and Examples; McGraw Hill, 1971.
    [3]
    Knudsen, M.J., PMSL, An Interactive Language for Systemlevel Description and Analysis of Computer Structures; Ph.D. thesis, Dept. of Computer Science, Carnegie-Mellon University, Pittscurgh, Pa. April 73
    [4]
    Piloty, R., RTS I (Registertransfersprache); 3. Aufl., Institut für Nachrichtenverarbeitung, TH Darmstadt, 1969
    [5]
    Lee, J.A.N., VDL - A Definitional System for all Levels; Proc. 1st Annual Symp. on Computer Architecture, Computer Arch. News, Dec.1973, Vol.2, no. 4, pp 41-48.

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    Published In

    cover image ACM SIGARCH Computer Architecture News
    ACM SIGARCH Computer Architecture News  Volume 4, Issue 4
    January 1976
    210 pages
    ISSN:0163-5964
    DOI:10.1145/633617
    Issue’s Table of Contents

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    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 17 January 1976
    Published in SIGARCH Volume 4, Issue 4

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