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A software instruction counter

Authors:

J. M. Mellor-Crummey,

T. J. LeBlancAuthors Info & Claims

ASPLOS III: Proceedings of the third international conference on Architectural support for programming languages and operating systems

Pages 78 - 86

https://doi.org/10.1145/70082.68189

Published: 01 April 1989 Publication History

Abstract

Although several recent papers have proposed architectural support for program debugging and profiling, most processors do not yet provide even basic facilities, such as an instruction counter. As a result, system developers have been forced to invent software solutions. This paper describes our implementation of a software instruction counter for program debugging. We show that an instruction counter can be reasonably implemented in software, often with less than 10% execution overhead. Our experience suggests that a hardware instruction counter is not necessary for a practical implementation of watch-points and reverse execution, however it will make program instrumentation much easier for the system developer.

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Digital Equipment Corporation. VAX Architecture Handbook. Digital Equipment Corporation, Maynard, MA, 1981.

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R. Fowler, T. LeBlanc, and J. Mellor-Crummey. An integrated approach to parallel program debugging and performance analysis on largescale multiprocessors. In Proc. of the SIG- PLAN/$IGOP$ Workshop on Parallel and Distributed Debugging, pages 163-173, Madison, WI, May 1988.

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Shen YHeiser GElphinstone K(2019)Fault Tolerance Through Redundant Execution on COTS Multicores: Exploring Trade-Offs2019 49th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)10.1109/DSN.2019.00031(188-200)Online publication date: Jun-2019
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Index Terms

A software instruction counter
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
      1. Multiple instruction, multiple data
      2. Very long instruction word
    2. Serial architectures
      1. Complex instruction set computing
      2. Reduced instruction set computing
2. Software and its engineering
  1. Software creation and management
    1. Software verification and validation
      1. Software defect analysis
        Software testing and debugging

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Published In

cover image ACM Conferences

ASPLOS III: Proceedings of the third international conference on Architectural support for programming languages and operating systems

April 1989

303 pages

ISBN:0897913000

DOI:10.1145/70082

Chairman:
Joel Emer,
General Chair:
John Hennessy
Stanford University

ACM SIGARCH Computer Architecture News Volume 17, Issue 2
Special issue: Proceedings of ASPLOS-III: the third international conference on architecture support for programming languages and operating systems
April 1989
291 pages
ISSN:0163-5964
DOI:10.1145/68182
Editor:
Joel Emer
Issue’s Table of Contents

Copyright © 1989 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 01 April 1989

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ASPLOS89: Int'l Conference on Architecture Support for Programming Lang & Operating Systems

April 3 - 6, 1989

Massachusetts, Boston, USA

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Cited By

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https://dl.acm.org/doi/10.1145/3356579
El-Hokayem AFalcone Y(2020)On the Monitoring of Decentralized SpecificationsACM Transactions on Software Engineering and Methodology10.1145/335518129:1(1-57)Online publication date: 30-Jan-2020
https://dl.acm.org/doi/10.1145/3355181
Shen YHeiser GElphinstone K(2019)Fault Tolerance Through Redundant Execution on COTS Multicores: Exploring Trade-Offs2019 49th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)10.1109/DSN.2019.00031(188-200)Online publication date: Jun-2019
https://doi.org/10.1109/DSN.2019.00031
Treffer AUflacker M(2017)Back-in-Time Debugging in Heterogeneous Software Stacks2017 IEEE International Symposium on Software Reliability Engineering Workshops (ISSREW)10.1109/ISSREW.2017.62(183-190)Online publication date: Oct-2017
https://doi.org/10.1109/ISSREW.2017.62
Negele FFriedrich FOh SEgger B(2017)On the Design and Implementation of an Efficient Lock-Free SchedulerJob Scheduling Strategies for Parallel Processing10.1007/978-3-319-61756-5_2(22-45)Online publication date: 12-Jul-2017
https://doi.org/10.1007/978-3-319-61756-5_2
Burtsev AJohnson DHibler MEide ERegehr J(2016)Abstractions for Practical Virtual Machine ReplayACM SIGPLAN Notices10.1145/3007611.289225751:7(93-106)Online publication date: 25-Mar-2016
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Burtsev AJohnson DHibler MEide ERegehr JGupta-Cledat VPorter DSarkar V(2016)Abstractions for Practical Virtual Machine ReplayProceedings of the12th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments10.1145/2892242.2892257(93-106)Online publication date: 25-Mar-2016
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Arafa PKashif HFischmeister SErnst RSokolsky O(2013)DIMEProceedings of the Eleventh ACM International Conference on Embedded Software10.5555/2555754.2555779(1-10)Online publication date: 29-Sep-2013
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Arafa PKashif HFischmeister S(2013)DIME: Time-aware dynamic binary instrumentation using rate-based resource allocation2013 Proceedings of the International Conference on Embedded Software (EMSOFT)10.1109/EMSOFT.2013.6658603(1-10)Online publication date: Sep-2013
https://doi.org/10.1109/EMSOFT.2013.6658603
Sumner WZhang XDenney EBultan TZeller A(2013)Identifying execution points for dynamic analysesProceedings of the 28th IEEE/ACM International Conference on Automated Software Engineering10.1109/ASE.2013.6693069(81-91)Online publication date: 11-Nov-2013
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