Generating Process Network Communication Infrastructure for Custom Multi-Core Platforms
Pages 37 - 63
Abstract
We present an approach for generating implementations of abstraction layers implementing the communication infrastructure of applications modeled as process networks. Our approach is unique in that it does not rely on assumptions about the capabilities and topology of the underlying platform. Instead, a generic implementation is adapted to the particular platform based on information retrieved from analyzing the platform. At the heart of the approach is a novel method for analyzing the capabilities of custom execution platforms composed of components. The versatility and usefulness of the approach and analysis method is demonstrated through a case study.
References
[1]
Abdi, S., Shin, D., & Gajski, D. 2003. Automatic communication refinement for system level design. In DAC '03: Proceedings of the 40th Conference on Design Automation, Anaheim, CA pp. 300-305. New York: ACM Publishing.
[2]
Altera. 2009. Quartus® II Development Software handbook: SOPC Builder. Retrieved May 2009, from http://www.altera.com/literature/lit-sop.jsp
[3]
Bergamaschi, R., Lee, W. R., Richardson, D., Bhattacharya, S., Muhlada, M., Wagner, R., et al. 2000. Coral - automating the design of systems-on-chip using cores. In Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, Orlando, FL pp. 109-112. Washington, DC: IEEE Computer Society.
[4]
Cesario, W. O., Lyonnard, D., Nicolescu, G., Paviot, Y., Sungjoo, Y., Jerraya, A. A., et al. 2002. Multiprocessor SoC platforms: A component-based design approach. Design & Test of Computers, 52-63.
[5]
de Kock, E. A., Smits, W. J., van der Wolf, P., Brunel, J.-Y., Kruijtzer, W. M., Lieverse, P., et al. 2000. YAPI: Application modeling for signal processing systems. In DAC '00: Proceedings of the 37th Conference on Design Automation, Los Angeles pp. 402-405. New York: ACM Publishing.
[6]
Garlan, D., Monroe, R. T., & Wile, D. 2000. Acme: Architectural description of component-based systems. In Foundations of component-based systems pp. 47-67. New York: Cambridge University Press.
[7]
Jerraya, A. A., Bouchhima, A., & Fréédéric, P. 2006. Programming models and HW-SW interfaces abstraction for multi-processor SoC. In DAC '06: Proceedings of the 43rd Annual Conference on Design Automation, San Francisco pp. 280-285. New York: ACM Publishing.
[8]
Kahn, G. 1974. The semantics of a simple language for parallel programming. In IFIP Congress 74. Amsterdmam, The Netherlands: North-Holland Publishing.
[9]
Kriaa, L., Bouchhima, A., Youssef, W., Petrot, F., Fouillart, A.-M., & Jerraya, A. 2006. Service based component design approach for flexible hardware/software interface modeling. In Proceedings of the Seventeenth IEEE International Workshop on Rapid System Prototyping, 2006, Chania, Crete pp. 156-162. Washington, DC: IEEE Computer Society.
[10]
Martin, G. 2006. Overview of the MPSoC design challenge. In Proceedings of the 43rd Annual Conference on Design Automation, San Francisco pp. 274-279. New York: ACM Publishing.
[11]
Nielson, F., Nielson, R. H., & Hankin, C. 2005. Principles of program analysis. In F. Nielson, R. H. Nielson, & C. Hankin Eds., Principles of program analysis pp. 365-392. Berlin, Germany: Springer Verlag.
[12]
Nieuwland, A., Kang, J., Gangwal, O. P., Sethuraman, R., Busá, N., & Goossens, K. et al . 2004. C-HEAP: A heterogeneous multi-processor architecture template and scalable and flexible protocol for the design of embedded signal processing systems. Design Automation for Embedded Systems, 233-270.
[13]
Nikolov, H., Stefanov, T., & Deprettere, E. 2008. Systematic and automated multiprocessor system design, programming and implementation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 542-555.
[14]
Paul, J. M. 2003. Programmers' views of SoCs. In Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, Newport Beach, CA pp. 156-181. New York: ACM Publishing.
[15]
Paulin, P. G., Pilkington, C., Langevin, M., Bensoudane, E., & Nicolescu, G. 2004. Parallel programming models for a multi-processor SoC platform applied to high-speed traffic management. In Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, Stockholm, Sweden pp. 48-53. New York: ACM Publishing.
[16]
Piementel, A. D., Hertzberger, L. O., Lieverse, P., van der Wolf, P., & Deprettere, F. E. 2001. Exploring embedded-systems architectures with Artemis. IEEE Computer, 57-63.
[17]
Sarmento, A., Kiraa, L., Arnaud, G., Youssef, M.-W., Bouchhima, A., Rousseau, F., et al. 2005. Service dependency graph, an efficient model for hardware/software interfaces modeling and generation for SoC design. In Proceedings of the Third IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS '05, Jersey City, NJ pp. 261-266. Washington, DC: IEEE Computer Society.
[18]
Todor, S., Zissulescu, C., Turjan, A., Kienhuis, B., & Deprettere, E. 2004. System design using Khan process networks: The Compaan/Laura approach. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition, 2004 pp. 340-345.
[19]
van der Wolf, P., de Kock, E., Henrikson, T., Kruijtzer, W., & Essink, G. 2004. Design and programming of embedded multiprocessors: An interface-centric approach. In Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, Stockholm, Sweden pp. 206-217. New York: ACM Publishing.
[20]
van Ommering, R., van der Linden, F., Kramer, J., & Magee, J. 2000. The Koala component model for consumer electronics software. IEEE Computer, 33, 78-85.
[21]
Xilinx. 2009. Xilinx Platform Studio and Embedded Development kit. Retrieved May 2009, from http://www.xilinx.com/tools/embedded.htm
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Published: 01 January 2010
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