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CASSE: A System-Level Modeling and Design-Space Exploration Tool for Multiprocessor Systems-on-Chip

Published: 31 August 2004 Publication History
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  • Abstract

    As SoC complexity grows new methodologies and tools for system design and time-effective design space exploration are required. In this paper we introduce a tool called CASSE, what stands for CAmellia System-on-chip Simulation Environment. CASSE is a fast, flexible, and modular SystemC-based simulation environment which aims to be useful for design-space exploration and system-level design at different abstraction levels. The tool uses transaction-level modeling techniques for fast simulations and easy architectural modeling, and bridge the gap to system implementation by a progressive refinement approach. CASSE is being used in the European IST-2001-34410 CAMELLIA project, which focuses on the mapping of innovative smart imaging applications onto an existing video encoding architecture.

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    • (2014)Using chip multithreading to speed up scenario-based design space explorationProceedings of the 6th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools10.1145/2555486.2555487(1-7)Online publication date: 22-Jan-2014
    • (2013)A system-level infrastructure for multidimensional MP-SoC design space co-explorationACM Transactions on Embedded Computing Systems10.1145/2536747.253674913:1s(1-26)Online publication date: 6-Dec-2013
    • (2009)Dimensioning heterogeneous MPSoCs via parallelism analysisProceedings of the Conference on Design, Automation and Test in Europe10.5555/1874620.1874755(554-557)Online publication date: 20-Apr-2009
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    Published In

    cover image Guide Proceedings
    DSD '04: Proceedings of the Digital System Design, EUROMICRO Systems
    August 2004
    697 pages
    ISBN:0769522033

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    IEEE Computer Society

    United States

    Publication History

    Published: 31 August 2004

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    • (2014)Using chip multithreading to speed up scenario-based design space explorationProceedings of the 6th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools10.1145/2555486.2555487(1-7)Online publication date: 22-Jan-2014
    • (2013)A system-level infrastructure for multidimensional MP-SoC design space co-explorationACM Transactions on Embedded Computing Systems10.1145/2536747.253674913:1s(1-26)Online publication date: 6-Dec-2013
    • (2009)Dimensioning heterogeneous MPSoCs via parallelism analysisProceedings of the Conference on Design, Automation and Test in Europe10.5555/1874620.1874755(554-557)Online publication date: 20-Apr-2009
    • (2006)A unified system-level modeling and simulation environment for MPSoC designProceedings of the conference on Design, automation and test in Europe: Proceedings10.5555/1131481.1131608(474-479)Online publication date: 6-Mar-2006
    • (2005)A multicast inter-task communication protocol for embedded multiprocessor systemsProceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis10.1145/1084834.1084901(267-272)Online publication date: 19-Sep-2005
    • (2005)The design of a smart imaging core for automotive and consumer applicationsProceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis10.1145/1084834.1084870(124-129)Online publication date: 19-Sep-2005

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