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High level synthesis of higher order continuous time state variable filters with minimum sensitivity and hardware count

Published: 06 March 2006 Publication History

Abstract

The sensitivity of the response of an analog system to circuit parameter variations is a vital performance metric for evaluation of its quality. This paper proposes a unified high level synthesis methodology for higher order continuous time state variable filters, considering the optimization of this metric. Minimization of the hardware count, which is another important issue, has also been taken into account at a much earlier stage of design. The entire methodology is illustrated with the case study of a state variable low pass filter and the benefits of the approach are clearly brought out.

References

[1]
Doboli, A. and Vemuri, R., Exploration-Based High-Level Synthesis of Linear Analog Systems Operating at Low/Medium Frequencies. IEEE Trans. CADICS, vol. 22, no 11, Nov 2003, pp., 1556--1567
[2]
Kailath, T. Linear Systems, Prentice Hall, Inc, Englewood Cliffs, N.J. 1980
[3]
Pandit, S. High Level Synthesis of Higher Order Continuous Time State Variable Filters with Minimum Sensitivity and Hardware Count: sit-www.sit.iitkgp.ernet.in/~soumyap/IntReport.pdf
[4]
Strang. G., Linear Algebra and its Applications. 3rd Edition Harcourt Brace Jovanovich, Publishers 1988

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Published In

cover image Guide Proceedings
DATE '06: Proceedings of the conference on Design, automation and test in Europe: Proceedings
March 2006
1390 pages
ISBN:3981080106

Sponsors

  • EDAA: European Design Automation Association
  • The EDA Consortium
  • IEEE-CS\DATC: The IEEE Computer Society

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European Design and Automation Association

Leuven, Belgium

Publication History

Published: 06 March 2006

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DATE '06 Paper Acceptance Rate 267 of 834 submissions, 32%;
Overall Acceptance Rate 518 of 1,794 submissions, 29%

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