research-article

An efficient wake-up schedule during power mode transition considering spurious glitches phenomenon

Authors:

Yu-Ting Chen,

Da-Cheng Juan,

Ming-Chao Lee,

Shih-Chieh ChangAuthors Info & Claims

ICCAD '07: Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design

Pages 779 - 782

Published: 05 November 2007 Publication History

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Abstract

During the power mode transition, a large surge current may lead to the malfunctions in a power-gating design. In this paper, we introduce several important properties of the surge current during the power mode transition for the Distributed Sleep Transistor Network (DSTN) designs. Based on these properties, we propose an accurate estimation of surge current and provide an efficient schedule on the DSTN structure. Our experiment achieved significantly better results than previous works---on average, 332 times wake-up time reduction and 35.48% less energy loss during the power mode transition.

References

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Gopalakrishnan VWu BChhabria VDev KYoo JMeinerzhagen P(2024)ML-INSIGHT: Machine Learning for Inrush Current Prediction and Power Switch Network ImprovementProceedings of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design10.1145/3665314.3670807(1-6)Online publication date: 5-Aug-2024
https://dl.acm.org/doi/10.1145/3665314.3670807
Lee MChen YHuang DChang S(2011)NBTI-aware power gating designProceedings of the 16th Asia and South Pacific Design Automation Conference10.5555/1950815.1950936(609-614)Online publication date: 25-Jan-2011
https://dl.acm.org/doi/10.5555/1950815.1950936
Xu HVemuri RJone WScheffer LPhillips JHu A(2010)Current shaping and multi-thread activation for fast and reliable power mode transition in multicore designsProceedings of the International Conference on Computer-Aided Design10.5555/2133429.2133564(637-641)Online publication date: 7-Nov-2010
https://dl.acm.org/doi/10.5555/2133429.2133564
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Published In

ICCAD '07: Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design

November 2007

933 pages

ISBN:1424413826

General Chair:
Georges Gielen
ESAT-MICAS, Katholieke Univ. Leuven, Leuven, Belgium

Publisher

IEEE Press

Publication History

Published: 05 November 2007

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ICCAD07

Sponsor:

CEDA
SIGDA
IEEE-CS\DATC

ICCAD07: The International Conference on Computer-Aided Design 2007

November 5 - 8, 2007

California, San Jose

Acceptance Rates

ICCAD '07 Paper Acceptance Rate 139 of 510 submissions, 27%;

Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Gopalakrishnan VWu BChhabria VDev KYoo JMeinerzhagen P(2024)ML-INSIGHT: Machine Learning for Inrush Current Prediction and Power Switch Network ImprovementProceedings of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design10.1145/3665314.3670807(1-6)Online publication date: 5-Aug-2024
https://dl.acm.org/doi/10.1145/3665314.3670807
Lee MChen YHuang DChang S(2011)NBTI-aware power gating designProceedings of the 16th Asia and South Pacific Design Automation Conference10.5555/1950815.1950936(609-614)Online publication date: 25-Jan-2011
https://dl.acm.org/doi/10.5555/1950815.1950936
Xu HVemuri RJone WScheffer LPhillips JHu A(2010)Current shaping and multi-thread activation for fast and reliable power mode transition in multicore designsProceedings of the International Conference on Computer-Aided Design10.5555/2133429.2133564(637-641)Online publication date: 7-Nov-2010
https://dl.acm.org/doi/10.5555/2133429.2133564
Paik SKim SShin YOklobdzija VPangle BChang NShanbhag NKim C(2010)Wakeup synthesis and its buffered tree construction for power gating circuit designsProceedings of the 16th ACM/IEEE international symposium on Low power electronics and design10.1145/1840845.1840936(413-418)Online publication date: 18-Aug-2010
https://dl.acm.org/doi/10.1145/1840845.1840936
Shin YSeomun JChoi KSakurai T(2010)Power gatingACM Transactions on Design Automation of Electronic Systems10.1145/1835420.183542115:4(1-37)Online publication date: 7-Oct-2010
https://dl.acm.org/doi/10.1145/1835420.1835421
Juan DChen YLee MChang S(2010)An efficient wake-up strategy considering spurious glitches phenomenon for power gating designsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2008.201032418:2(246-255)Online publication date: 1-Feb-2010
https://dl.acm.org/doi/10.1109/TVLSI.2008.2010324
Lee MChen YCheng YChang SRoychowdhury J(2009)An efficient wakeup scheduling considering resource constraint for sensor-based power gating designsProceedings of the 2009 International Conference on Computer-Aided Design10.1145/1687399.1687485(457-460)Online publication date: 2-Nov-2009
https://dl.acm.org/doi/10.1145/1687399.1687485
Akl CBayoumi MNarayanan VRavikumar CHenkel JKeshavarzi AOklobdzija VPangrle B(2008)Reducing wakeup latency and energy of MTCMOS circuits via keeper insertionProceedings of the 2008 international symposium on Low Power Electronics & Design10.1145/1393921.1393942(69-74)Online publication date: 11-Aug-2008
https://dl.acm.org/doi/10.1145/1393921.1393942

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An efficient wake-up strategy considering spurious glitches phenomenon for power gating designs

Dynamic characteristics of power gating during mode transition

A robust power gating structure and power mode transition strategy for MTCMOS design

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An efficient wake-up strategy considering spurious glitches phenomenon for power gating designs

Dynamic characteristics of power gating during mode transition

A robust power gating structure and power mode transition strategy for MTCMOS design

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