A DSP-enhanced 32-bit embedded microprocessor
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- A DSP-enhanced 32-bit embedded microprocessor
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A DSP-Enhanced 32-bit embedded microprocessor
EUC'05: Proceedings of the 2005 international conference on Embedded and Ubiquitous ComputingEISC (Extendable Instruction Set Computer) is a compres-breal sed code architecture developed for embedded applications. In this paper, we propose a DSP-enhanced embedded microprocessor based on the 32-bit EISC architecture. We present how we could ...
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IOS Press
Netherlands
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