Article

Compatible phase co-scheduling on a CMP of multi-threaded processors

Authors:

David H. Albonesi,

Sandhya DwarkadasAuthors Info & Claims

IPDPS'06: Proceedings of the 20th international conference on Parallel and distributed processing

Page 141

Published: 25 April 2006 Publication History

Abstract

The industry is rapidly moving towards the adoption of Chip Multi-Processors (CMPs) of Simultaneous Multi-Threaded (SMT) cores for general purpose systems. The most prominent use of such processors, at least in the near term, will be as job servers running multiple independent threads on the different contexts of the various SMT cores. In such an environment, the co-scheduling of phases from different threads plays a significant role in the overall throughput. Less throughput is achieved when phases from different threads that conflict for particular hardware resources are scheduled together, compared with the situation where compatible phases are co-scheduled on the same SMT core. Achieving the latter requires precise per-phase hardware statistics that the scheduler can use to rapidly identify possible incompatibilities among phases of different threads, thereby avoiding the potentially high performance cost of inter-thread contention.

In this paper, we devise phase co-scheduling policies for a dual-core CMP of dual-threaded SMT processors. We explore a number of approaches and find that the use of ready and in-flight instruction metrics permits effective co-scheduling of compatible phases among the four contexts. This approach significantly outperforms the worst static grouping of threads, and very closely matches the best static grouping, even outperforming it by as much as 7%.

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Nesterenko BYi QRao J(2018)Improving Resource Utilization through Demand Aware Process SchedulingProceedings of the 47th International Conference on Parallel Processing10.1145/3225058.3225132(1-10)Online publication date: 13-Aug-2018
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cover image ACM Other conferences

IPDPS'06: Proceedings of the 20th international conference on Parallel and distributed processing

April 2006

399 pages

ISBN:1424400546

Sponsors

IEEE CS TCPP: IEEE Computer Society Technical Committee on Parallel Processing

In-Cooperation

IEEE TCCA: IEEE Computer Society Technical Committee on Computer Architecture
SIGARCH: ACM Special Interest Group on Computer Architecture
IEEE Computer Society Technical Committee on Distributed Processing

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IEEE Computer Society

United States

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Published: 25 April 2006

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Cited By

Nesterenko BYi QRao J(2018)Improving Resource Utilization through Demand Aware Process SchedulingProceedings of the 47th International Conference on Parallel Processing10.1145/3225058.3225132(1-10)Online publication date: 13-Aug-2018
https://dl.acm.org/doi/10.1145/3225058.3225132
Zhu QWu BShen XShen KShen LWang Z(2018)Resolving the GPU responsiveness dilemma through program transformationsFrontiers of Computer Science: Selected Publications from Chinese Universities10.1007/s11704-016-6206-y12:3(545-559)Online publication date: 1-Jun-2018
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Xu QJeon HKim KRo WAnnavaram M(2016)Warped-slicerACM SIGARCH Computer Architecture News10.1145/3007787.300116144:3(230-242)Online publication date: 18-Jun-2016
https://dl.acm.org/doi/10.1145/3007787.3001161
Xu QJeon HKim KRo WAnnavaram MMin SLoh G(2016)Warped-slicerProceedings of the 43rd International Symposium on Computer Architecture10.1109/ISCA.2016.29(230-242)Online publication date: 18-Jun-2016
https://dl.acm.org/doi/10.1109/ISCA.2016.29
Kalayappan RSarangi S(2015)FluidCheckACM Transactions on Architecture and Code Optimization10.1145/284262012:4(1-26)Online publication date: 22-Dec-2015
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Tillenius MLarsson EBadia RMartorell X(2015)Resource-Aware Task SchedulingACM Transactions on Embedded Computing Systems10.1145/263855414:1(1-25)Online publication date: 21-Jan-2015
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Chen QGuo M(2014)Adaptive workload-aware task scheduling for single-ISA asymmetric multicore architecturesACM Transactions on Architecture and Code Optimization10.1145/257967411:1(1-25)Online publication date: 1-Feb-2014
https://dl.acm.org/doi/10.1145/2579674
Libutti SMassari GBellasi PFornaciari WSilvano CCardoso JHuebner M(2014)Exploiting Performance Counters for Energy Efficient Co-Scheduling of Mixed Workloads on Multi-Core PlatformsProceedings of Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms10.1145/2556863.2556866(27-32)Online publication date: 20-Jan-2014
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Radojković PČakarević VMoretó MVerdú JPajuelo ACazorla FNemirovsky MValero M(2012)Optimal task assignment in multithreaded processorsACM SIGPLAN Notices10.1145/2248487.215100247:4(235-248)Online publication date: 3-Mar-2012
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Eyerman SEeckhout L(2012)Probabilistic modeling for job symbiosis scheduling on SMT processorsACM Transactions on Architecture and Code Optimization10.1145/2207222.22072239:2(1-27)Online publication date: 15-Jun-2012
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