Article

Learning to schedule straight-line code

Authors:

David ScheeffAuthors Info & Claims

NIPS'97: Proceedings of the 10th International Conference on Neural Information Processing Systems

Pages 929 - 935

Published: 01 December 1997 Publication History

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Abstract

Program execution speed on modern computers is sensitive, by a factor of two or more, to the order in which instructions are presented to the processor. To realize potential execution efficiency, an optimizing compiler must employ a heuristic algorithm for instruction scheduling. Such algorithms are painstakingly hand-crafted, which is expensive and time-consuming. We show how to cast the instruction scheduling problem as a learning task, obtaining the heuristic scheduling algorithm automatically. Our focus is the narrower problem of scheduling straight-line code (also called basic blocks of instructions). Our empirical results show that just a few features are adequate for quite good performance at this task for a real modern processor, and that any of several supervised learning methods perform nearly optimally with respect to the features used.

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Cited By

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Canesche MRosário VBorin EQuintão Pereira F(2024)The Droplet Search Algorithm for Kernel SchedulingACM Transactions on Architecture and Code Optimization10.1145/365010921:2(1-28)Online publication date: 21-May-2024
https://dl.acm.org/doi/10.1145/3650109
Patabandi THall MVerbrugge CLhoták OShen X(2023)Efficiently Learning Locality Optimizations by Decomposing Transformation DomainsProceedings of the 32nd ACM SIGPLAN International Conference on Compiler Construction10.1145/3578360.3580272(37-49)Online publication date: 17-Feb-2023
https://dl.acm.org/doi/10.1145/3578360.3580272
Mahajan AAli MPatil M(2008)Instruction scheduling using evolutionary programmingProceedings of the WSEAS International Conference on Applied Computing Conference10.5555/1415804.1415830(137-144)Online publication date: 27-May-2008
https://dl.acm.org/doi/10.5555/1415804.1415830
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Learning to schedule straight-line code
1. Theory of computation
  1. Design and analysis of algorithms
    1. Approximation algorithms analysis
  2. Theory and algorithms for application domains
    1. Machine learning theory
      1. Reinforcement learning

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NIPS'97: Proceedings of the 10th International Conference on Neural Information Processing Systems

December 1997

1077 pages

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MIT Press

Cambridge, MA, United States

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Published: 01 December 1997

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Canesche MRosário VBorin EQuintão Pereira F(2024)The Droplet Search Algorithm for Kernel SchedulingACM Transactions on Architecture and Code Optimization10.1145/365010921:2(1-28)Online publication date: 21-May-2024
https://dl.acm.org/doi/10.1145/3650109
Patabandi THall MVerbrugge CLhoták OShen X(2023)Efficiently Learning Locality Optimizations by Decomposing Transformation DomainsProceedings of the 32nd ACM SIGPLAN International Conference on Compiler Construction10.1145/3578360.3580272(37-49)Online publication date: 17-Feb-2023
https://dl.acm.org/doi/10.1145/3578360.3580272
Mahajan AAli MPatil M(2008)Instruction scheduling using evolutionary programmingProceedings of the WSEAS International Conference on Applied Computing Conference10.5555/1415804.1415830(137-144)Online publication date: 27-May-2008
https://dl.acm.org/doi/10.5555/1415804.1415830
Malik ARussell TChase MBeek P(2008)Learning heuristics for basic block instruction schedulingJournal of Heuristics10.1007/s10732-007-9051-114:6(549-569)Online publication date: 1-Dec-2008
https://dl.acm.org/doi/10.1007/s10732-007-9051-1
Russell TMalik AChase Mvan Beek PWildberger MCouturier CKark ACordy J(2005)Learning basic block scheduling heuristics from optimal dataProceedings of the 2005 conference of the Centre for Advanced Studies on Collaborative research10.5555/1105634.1105652(242-253)Online publication date: 17-Oct-2005
https://dl.acm.org/doi/10.5555/1105634.1105652

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Recommendations

Scheduling Straight-Line Code Using Reinforcement Learning and Rollouts

Scheduling straight-line code using reinforcement learning and rollouts

STRAIGHT: hazardless processor architecture without register renaming

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