Implementing precise interrupts in piplined processors

Interrupts and in particular precise interrupts constitute an integral part of all computer architectures. Implementing precise interrupts can substantially inhibit the performance of computers. To gain some insight into the problem, we divide common ...

Five solutions to the precise interrupt problem in pipelined processors are described and evaluated. An interrupt is precise if the saved process state corresponds to a sequential model of program execution in which one instruction completes before the ...

An exception is precise if all instructions before the faulting instruction have completed and those instructions following it can be restarted from scratch. If all exceptions in a processor are precise, the processor is said to implement the precise ...