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An off-chip attack on hardware enclaves via the memory bus

Published: 12 August 2020 Publication History

Abstract

This paper shows how an attacker can break the confidentiality of a hardware enclave with MEMBUSTER, an off-chip attack based on snooping the memory bus. An attacker with physical access can observe an unencrypted address bus and extract fine-grained memory access patterns of the victim. MEMBUSTER is qualitatively different from prior on-chip attacks to enclaves and is more difficult to thwart.
We highlight several challenges for MEMBUSTER. First, DRAM requests are only visible on the memory bus at last-level cache misses. Second, the attack needs to incur minimal interference or overhead to the victim to prevent the detection of the attack. Lastly, the attacker needs to reverse-engineer the translation between virtual, physical, and DRAM addresses to perform a robust attack. We introduce three techniques, critical page whitelisting, cache squeezing, and oracle-based fuzzy matching algorithm to increase cache misses for memory accesses that are useful for the attack, with no detectable interference to the victim, and to convert memory accesses to sensitive data. We demonstrate MEMBUSTER on an Intel SGX CPU to leak confidential data from two applications: Hunspell and Memcached. We show that a single uninterrupted run of the victim can leak most of the sensitive data with high accuracy.

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  • (2024)Stream Processing with Adaptive Edge-Enhanced Confidential ComputingProceedings of the 7th International Workshop on Edge Systems, Analytics and Networking10.1145/3642968.3654819(37-42)Online publication date: 22-Apr-2024
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  • (2021)Ghost routing to enable oblivious computation on memory-centric networksProceedings of the 48th Annual International Symposium on Computer Architecture10.1109/ISCA52012.2021.00077(930-943)Online publication date: 14-Jun-2021
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    cover image Guide Proceedings
    SEC'20: Proceedings of the 29th USENIX Conference on Security Symposium
    August 2020
    2809 pages
    ISBN:978-1-939133-17-5

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    Publication History

    Published: 12 August 2020

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    View all
    • (2024)Stream Processing with Adaptive Edge-Enhanced Confidential ComputingProceedings of the 7th International Workshop on Edge Systems, Analytics and Networking10.1145/3642968.3654819(37-42)Online publication date: 22-Apr-2024
    • (2023)Veil: A Protected Services Framework for Confidential Virtual MachinesProceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 410.1145/3623278.3624763(378-393)Online publication date: 25-Mar-2023
    • (2021)Ghost routing to enable oblivious computation on memory-centric networksProceedings of the 48th Annual International Symposium on Computer Architecture10.1109/ISCA52012.2021.00077(930-943)Online publication date: 14-Jun-2021
    • (2020)TRUSTORE: Side-Channel Resistant Storage for SGX using Intel Hybrid CPU-FPGAProceedings of the 2020 ACM SIGSAC Conference on Computer and Communications Security10.1145/3372297.3417265(1903-1918)Online publication date: 30-Oct-2020

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