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vUML: A Tool for Verifying UML Models

Published: 12 October 1999 Publication History

Abstract

The Unified Modeling Language (UML) is a standardized notation for describing object-oriented software designs. We present vUML, a tool that automatically verifies UML models where the behavior of the objects is described using UML State-charts diagrams. The tool uses the SPIN model checker to perform the verification, but the user does not have to know how to use SPIN or the PROMELA language. If an error is found during the verification, the tool creates a UML sequence diagram showing how to reproduce the error in the model.

Cited By

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  • (2019)Efficient Verification of Concurrent Systems Using Synchronisation Analysis and SAT/SMT SolvingACM Transactions on Software Engineering and Methodology10.1145/333514928:3(1-43)Online publication date: 18-Jul-2019
  • (2019)Mistakes in UML diagramsProceedings of the 41st International Conference on Software Engineering: Software Engineering Education and Training10.1109/ICSE-SEET.2019.00019(100-109)Online publication date: 27-May-2019
  • (2019)A feature-based classification of formal verification techniques for software modelsSoftware and Systems Modeling (SoSyM)10.1007/s10270-017-0591-z18:1(473-498)Online publication date: 1-Feb-2019
  • Show More Cited By

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Published In

cover image Guide Proceedings
ASE '99: Proceedings of the 14th IEEE international conference on Automated software engineering
October 1999
ISBN:0769504159

Publisher

IEEE Computer Society

United States

Publication History

Published: 12 October 1999

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Overall Acceptance Rate 82 of 337 submissions, 24%

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Cited By

View all
  • (2019)Efficient Verification of Concurrent Systems Using Synchronisation Analysis and SAT/SMT SolvingACM Transactions on Software Engineering and Methodology10.1145/333514928:3(1-43)Online publication date: 18-Jul-2019
  • (2019)Mistakes in UML diagramsProceedings of the 41st International Conference on Software Engineering: Software Engineering Education and Training10.1109/ICSE-SEET.2019.00019(100-109)Online publication date: 27-May-2019
  • (2019)A feature-based classification of formal verification techniques for software modelsSoftware and Systems Modeling (SoSyM)10.1007/s10270-017-0591-z18:1(473-498)Online publication date: 1-Feb-2019
  • (2017)A Logic-Based Approach for the Verification of UML Timed ModelsACM Transactions on Software Engineering and Methodology10.1145/310641126:2(1-47)Online publication date: 18-Sep-2017
  • (2016)Lightweight and static verification of UML executable modelsComputer Languages, Systems and Structures10.1016/j.cl.2016.07.00246:C(66-90)Online publication date: 1-Nov-2016
  • (2015)Checking concurrent behavior in UML/OCL modelsProceedings of the 18th International Conference on Model Driven Engineering Languages and Systems10.5555/3351736.3351760(176-185)Online publication date: 30-Sep-2015
  • (2013)Towards domain-specific property languagesProceedings of the 2013 ACM workshop on Domain-specific modeling10.1145/2541928.2541936(39-44)Online publication date: 27-Oct-2013
  • (2013)USMMC: a self-contained model checker for UML state machinesProceedings of the 2013 9th Joint Meeting on Foundations of Software Engineering10.1145/2491411.2494595(623-626)Online publication date: 18-Aug-2013
  • (2013)Engineering model transformations with transMLSoftware and Systems Modeling (SoSyM)10.1007/s10270-011-0211-212:3(555-577)Online publication date: 1-Jul-2013
  • (2012)A dynamic assertion-based verification platform for validation of UML designsACM SIGSOFT Software Engineering Notes10.1145/2088883.208889137:1(1-14)Online publication date: 27-Jan-2012
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