From the Publisher:
This book addresses the two most active research areas of design automation today: high-level synthesis and system-level synthesis. In particular, a transformational approach to synthesis from VHDL specifications is described. System Synthesis with VHDL provides a coherent view of system synthesis which includes the high-level and the system-level synthesis tasks. VHDL is used as a specification language and several issues concerning the use of VHDL for high-level and system-level synthesis are discussed. These include aspects from the compilation of VHDL into an internal design representation to the synthesis of systems specified as interacting VHDL processes. System Synthesis with VHDL can be used for advanced undergraduate or graduate courses in the area of design automation and, more specifically, of high-level and system-level synthesis. At the same time the book is intended for CAD developers and researchers as well as industrial designers of digital systems who are interested in new algorithms and techniques supporting modern design tools and methodologies.
Cited By
- Götz M, Rettberg A, Pereira C and Rammig F (2009). Run-time reconfigurable RTOS for reconfigurable systems-on-chip, Journal of Embedded Computing, 3:1, (39-51), Online publication date: 1-Jan-2009.
- Wei S and Xu W Acoustic level dynamic compression characteristics with FPGA implementation Proceedings of the 7th WSEAS International Conference on Signal, Speech and Image Processing, (8-13)
- Götz M, Rettberg A and Pereira C A run-time partitioning algorithm for RTOS on reconfigurable hardware Proceedings of the 2005 international conference on Embedded and Ubiquitous Computing, (469-478)
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