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View all- Baev IMeleis WAbraham S(2002)Backtracking-Based Instruction Scheduling to Fill Branch Delay SlotsInternational Journal of Parallel Programming10.1023/A:102060111039130:6(397-418)Online publication date: 1-Dec-2002
Meld Scheduling: A Technique for Relaxing Scheduling Constraints
Abstract
Meld scheduling melds the schedules of neighboring scheduling regions to respect latencies of operations issued in one region but completing after control transfers to the other. In contrast, conventional schedulers ignore latency constraints from other regions leading to potentially avoidable stalls in an interlocked (superscalar) machine or incorrect schedules for noninterlocked (VLIW) machines. Alternatively, schedulers that conservatively require all operations to complete before the branch takes effect produce inefficient schedules. In this paper, we present general data structures for maintaining latency constraint information at region boundaries. We present a meld scheduling algorithm for noninterlocked processors that generates latency constraints at the boundaries of scheduled regions and utilizes this information during the scheduling of other regions. We present a range of design options and describe the reasons behind our particular choices. We evaluate the performance of meld scheduling on a range of machine models on a set of SPEC92 and UNIX benchmarks.
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Index Terms
- Meld Scheduling: A Technique for Relaxing Scheduling Constraints
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Copyright © Copyright © 1998 Plenum Publishing Corporation.
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Kluwer Academic Publishers
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Published: 01 August 1998
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View all- Baev IMeleis WAbraham S(2002)Backtracking-Based Instruction Scheduling to Fill Branch Delay SlotsInternational Journal of Parallel Programming10.1023/A:102060111039130:6(397-418)Online publication date: 1-Dec-2002