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A Methodology to Design Programmable Embedded Systems - The Y-Chart Approach

Published: 01 January 2002 Publication History

Abstract

Embedded systems architectures are increasingly becoming programmable, which means that an architecture can execute a set of applications instead of only one. This makes these systems cost-effective, as the same resources can be reused for another application by reprogramming the system. To design these programmable architectures, we present in this article a number of concepts of which one is the Y-chart approach. These concepts allow designers to perform a systematic exploration of the design space of architectures. Since this design space may be huge, it is narrowed down in a number of steps. The concepts presented in this article provide a methodology in which architectures can be obtained that satisfies a set of constraints while establishing enough flexibility to support a given set of applications.

References

[1]
Claasen, T.: Technical and industrial challenges for signal processing in consumer electronics: A case study on TV applications. In: Proceedings of VLSI Signal Processing, VI. (1993) 3-11.
[2]
Richards, M.A.: The rapid prototyping of application specific signal processors (RASSP) program: Overview and status. In: 5th International Workshop on Rapid System Prototyping, IEEE Computer Society Press (1994) 1-6.
[3]
De Micheli, G., Sami, M.: Hardware/Software Co-Design. Volume 310 of Series E: Applied Sciences. NATO ASI Series (1996).
[4]
Kalavade, A., Subrahmanyam, P.: Hardware/software partioning for multi-function systems. In: Proc. of ICCAD'97. (1997) 516-521.
[5]
Hennessy, J.L., Patterson, D.A.: Computer Architectures: A Quantitative Approach. second edn. Morgan Kaufmann Publishers, Inc. (1996).
[6]
Kienhuis, B., Deprettere, E., Vissers, K., van der Wolf, P.: An approach for quantitative analysis of application-specific dataflow architectures. In: Proceedings of 11th Int. Conference of Applications-specific Systems, Architectures and Processors (ASAP'97), Zurich, Switzerland (1997) 338-349.
[7]
Gajski, D.: Silicon Compilers. Addison-Wesley (1987).
[8]
Kienhuis, B., Deprettere, E., Vissers, K., van der Wolf, P.: The construction of a retargetable simulator for an architecture template. In: Proceedings of 6th Int. Workshop on Hardware/Software Codesign, Seattle, Washington (1998).
[9]
Balarin, F. abd Giusto, P., Jurecska, A., Passerone, C., Sentovich, E., Tabbara, B., Chiodo, M., Hsieh, H., Lavagno, L., Sangiovanni-Vincentelli, A.L., Suzuki, K.: Hardware-Software Co-Design of Embedded Systems: The POLIS Approach. Kluwer Academic Publishers (1997).
[10]
Kienhuis, B.A.: Design Space Exploration of Stream-based Dataflow Architectures: Methods and Tools. PhD thesis, Delft University of Technology, The Netherlands (1999).
[11]
Lavenberg, S.S.: Computer Performance Modeling Handbook. Acadamic Press (1983).
[12]
van Gemund, A.J.: Performance Modeling of Parallel Systems. PhD thesis, Laboratory of Computer Architecture and Digital Techniques, Delft University of Technology (1996).
[13]
Lieverse, P., van der Wolf, P., Vissers, K., Deprettere, E.F.: A methodology for architecture exploration of heterogeneous signal processing systems. Journal of VLSI Signal Processing for Signal, Image and Video Technology 29 (2001) 197- 207.
[14]
Kruijtzer, W.: Tss: Tool for system simulation. IST Newsletter, Philips Research Laboratories (1997) 5-7 Issue 17.
[15]
Liao, S., Tjiang, S., Gupta, R.: An efficient implementation of reactivity for modeling hardware in the scenic design environment. In: Proceedings of DAC-97. (1997).
[16]
Lee, E.A., et al.: An overview of the Ptolemy project. Technical report, University of California at Berkeley (1994).
[17]
Chang, W.T., Ha, S., Lee, E.A.: Heterogeneous simulation - mixing discrete-event models with dataflow. VLSI Signal Processing 15 (1997) 127-144.
[18]
van Berkel, K.: Handshake Circuits: an asynchronous architecture for VLSI programming,. Cambridge University Press (1993).
[19]
Vissers, K., Essink, G., van Gerwen, P., Janssen, P., Popp, O., Riddersma, E., Veendrick, J.: Architecture and programming of two generations video signal processors. In: Algorithms and Parallel VLSI Architectures III. Elsevier (1995) 167-178.
[20]
Patterson, D.: Reduced instruction set computers. Comm. ACM 28 (1985) 8-21.
[21]
Bose, P., Conte, T.M.: Performance analysis and its impact on design. IEEE Computer 31 (1998) 41-49.
[22]
Hennessy, J., Heinrich, M.: Hardware/software codesign of processors: Concepts and examples. In Micheli, G.D., Sami, M., eds.: Hardware/Software Codesign. Volume 310 of Series E: Applied Sciences. NATO ASI Series (1996) 29-44.
[23]
Camposano, R., Wilberg, J.: Embedded system design. Design Automation for Embedded Systems 1 (1996) 5-50.
[24]
Corporaal, H., Mulder, H.: Move: A framework for high-performance processor design. In: Proceedings of Supercomputing, Albuquerque (1991) 692-701.
[25]
Sijstermans, F., Pol, E., Riemens, B., Vissers, K., Rathnam, S., Slavenburg, G.: Design space exploration for future trimedia CPUs. In: ICASSP'98. (1998).
[26]
¿ivojnovic, V., Pees, S., Schläger, C., Willems, M., Schoenen, R., Meyr, H.: DSP Processor/Compiler Co-Design: A Quantitative Approach. In: Proc. ISSS. (1996).
[27]
Rabaey, J., Potkonjak, M., Koushanfar, F., li, S., Tuan, T.: Challenges and opportunities in broadband and wireless communication designs. In: Proceedings of ICCAD. (2000).
[28]
Hekstra, G., La Hei, G., Bingley, P., Sijstermans, F.: Trimedia cpu64 design space exploration. In: ICCD. (1999).
[29]
Marculescu, R., Nandi, A.: Probabilistic application modeling for system-level performance analysis. In: Proceedings Design, Automation and Test in Europe (DATE'01), Munich, Germany (2001) 190-196.
[30]
de Kock, E., Essink, G., Smits, W., van der Wolf, P., Brunel, J., Kruijtzer, W., Lieverse, P., Vissers, K.: Yapi: Application modeling for signal processing systems (2000).
[31]
Keutzer, K., Malik, S., Newton, A.R., Rabaey, J.M., Sangiovanni-Vincentelli, A.: System-level design: Orthogonalization of concerns and platform-based design. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 19 (2000) 1523-1543.

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  1. A Methodology to Design Programmable Embedded Systems - The Y-Chart Approach

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    Published In

    cover image Guide Proceedings
    Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
    January 2002
    325 pages

    Publisher

    Springer-Verlag

    Berlin, Heidelberg

    Publication History

    Published: 01 January 2002

    Author Tags

    1. Y-chart approach
    2. abstraction pyramid
    3. architecture template
    4. design space exploration
    5. embedded systems
    6. stack of Y-charts

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