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Two-dimensional test data compression for scan-based deterministic BIST

Published: 30 October 2001 Publication History

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  • (2019)Logic BIST With Capture-Per-Clock Hybrid Test PointsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2018.283444138:6(1028-1041)Online publication date: 1-Jun-2019
  • (2017)Star-EDTIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2016.259721436:4(683-693)Online publication date: 1-Apr-2017
  • (2010)Correlation-based rectangular encodingIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2009.202588218:10(1483-1492)Online publication date: 1-Oct-2010
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    cover image Guide Proceedings
    Proceedings of the IEEE International Test Conference 2001
    October 2001
    1170 pages
    ISBN:0780371690

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    IEEE Computer Society

    United States

    Publication History

    Published: 30 October 2001

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    • (2019)Logic BIST With Capture-Per-Clock Hybrid Test PointsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2018.283444138:6(1028-1041)Online publication date: 1-Jun-2019
    • (2017)Star-EDTIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2016.259721436:4(683-693)Online publication date: 1-Apr-2017
    • (2010)Correlation-based rectangular encodingIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2009.202588218:10(1483-1492)Online publication date: 1-Oct-2010
    • (2010)A test set embedding approach based on twisted-ring counter with few seedsIntegration, the VLSI Journal10.1016/j.vlsi.2009.06.00143:1(81-100)Online publication date: 1-Jan-2010
    • (2008)State skip LFSRsProceedings of the conference on Design, automation and test in Europe10.1145/1403375.1403488(474-479)Online publication date: 10-Mar-2008
    • (2006)MICROIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2006.87822714:6(649-654)Online publication date: 1-Jun-2006
    • (2005)Response shaperProceedings of the 2005 IEEE/ACM International conference on Computer-aided design10.5555/1129601.1129615(80-87)Online publication date: 31-May-2005
    • (2005)Hybrid BIST Based on Repeating Sequences and Cluster AnalysisProceedings of the conference on Design, Automation and Test in Europe - Volume 210.1109/DATE.2005.177(1142-1147)Online publication date: 7-Mar-2005
    • (2004)3-Stage Variable Length Continuous-Flow Scan Vector Decompression SchemeProceedings of the 22nd IEEE VLSI Test Symposium10.5555/987684.987956Online publication date: 25-Apr-2004
    • (2004)Fault secureness need for next generation high performance microprocessor design for testability structuresProceedings of the 1st conference on Computing frontiers10.1145/977091.977153(444-450)Online publication date: 14-Apr-2004
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