Article

Free access

Routing method for VLSI design using irregular cells

Authors:

H. J. Rothermel,

D. A. MlynskiAuthors Info & Claims

DAC '83: Proceedings of the 20th Design Automation Conference

Pages 257 - 262

Published: 27 June 1983 Publication History

Abstract

In this paper a new routing method for cells of complex geometries (building blocks, macrocells) in hierarchical VLSI design is presented. It is based on an appropriate channel model and a channel routing algorithm for embedding net segments of variable wire width. An H-V-routing scheme is used for two layer routing. A new database system for handling n- corner rectangles of individual size and shape has been developed.

References

[1]

K. Kani, H. Kawanishi, A. Kishimoto, "ROBIN; A Building Block LSI Routing Program", IEEE Proc. ISCAS (1976), pp. 658-421.

[2]

B.T. Preas, C.W. Gwyn, "Methods for Hierarchical Automatic Layout of Custom LSI Circuit Masks", 15th Design Automation Conference, Las Vegas (1978), pp. 206-212.

Digital Library

[3]

K. Sato, T. Nagai, H. Shimoyama, T. Yahara, "MIRAGE - A Simple-Model Routing Program for the Hierarchical Layout Design of IC Masks", 15th Design Automation Conference, San Diego (1979), pp. 297-304.

Digital Library

[4]

G. Persky, C. Enger, D.M. Selove, "The Hughes Automated Layout System - Automated LSI/VLSI Layout Based on Channel Routing", 18th Design Automation Conference, Nashville (1981), pp. 22-28.

Digital Library

[5]

M. Wiesel, D.A. Mlynski, "An Efficient Channel Model for Building Block LSI", IEEE Proc. ISCAS (1981), pp. 118-121.

[6]

A. Hashimoto, J. Stevens, "Wire Routing by Optimizing Channel Assignment within Large Apertures", 8th Design Automation Workshop, (1971), pp. 155-169.

Digital Library

[7]

R.L. Mattison, "A High Quality, Low Cost Router for MOS/LSI", 9th Design Automation Workshop (1972), pp. 94-103.

Digital Library

[8]

D.N. Deutsch, "A Dogleg Channel Router", 13th Design Automation Conference, San Franzisco (1976), pp. 425-433

Digital Library

[9]

H-J. Rothermel, D.A. Mlynski, "IC Routing with Variable Wire Width", IEE Conf. Pub. Nr.200, European Design Automation Conference (1981), pp. 90-94.

[10]

D.W. Hightower, R.L. Boyd, "A Generalized Channel Router", 17th Design Automation Conference, Minneapolis (1980), pp. 12-21.

Digital Library

[11]

K. Sato, H. Shimoyama, T. Naya, M. Ozaki, T. Yahara, "A Grid Free Channel Router", 17th Design Automation Conference, Minneapolis (1880), pp. 22-31.

Digital Library

[12]

G.J. Wipfler, M. Wiesel, D.A. Mlynski, "A Combined Force and Cut Algorithm for Hierarchical VLSI Layout", 19th Design Automation Conference, Las Vegas (1982), pp. 671-677.

Digital Library

[13]

N.R. Quinn, M.A. Breuer, "A Force Directed Component Placement Procedure for Printed Circuit Boards", IEEE Transactions on Circuits And Systems, vol. CAS-26, 1979, pp. 377-388.

[14]

M.A. Breuer, "MIN-CUT Placement", Journal Design Aut. and Fault-tolerant Computing, vol. 1, Oct. 1977, pp. 343-362.

[15]

E.F. Moore, "The Shortest Path Trough a Maze", Annals 30, Proc. of the Intern. Symposion of Theorie of Switching, pp. 37-42.

Cited By

Hudson JWisniewski JPeters RLambert POfek HO'Neill LPistilli PLosleben PNash JShaklee DPreas BLerman H(1984)Module positioning algorithms for rectilinear macrocell assembliesProceedings of the 21st Design Automation Conference10.5555/800033.800878(672-675)Online publication date: 25-Jun-1984
https://dl.acm.org/doi/10.5555/800033.800878
Ng CLambert POfek HO'Neill LPistilli PLosleben PNash JShaklee DPreas BLerman H(1984)A symbolic-interconnect router for custom IC designProceedings of the 21st Design Automation Conference10.5555/800033.800773(52-58)Online publication date: 25-Jun-1984
https://dl.acm.org/doi/10.5555/800033.800773

Index Terms

Routing method for VLSI design using irregular cells
1. Hardware
  1. Communication hardware, interfaces and storage
    1. Buses and high-speed links
  2. Very large scale integration design
2. Theory of computation
  1. Design and analysis of algorithms
    1. Approximation algorithms analysis
      1. Routing and network design problems

Recommendations

New Routing Strategies for VLSI
Topological channel routing [VLSI]

A VLSI two-layer channel router designed to find solutions which minimize both wiring area and number of vias simultaneously is presented. The method, called topological channel routing, analyzes the topological relationship of wires before the wires ...
Automatic design planning and exploration of vlsi systems

Comments

Information & Contributors

Information

Published In

cover image ACM Conferences

DAC '83: Proceedings of the 20th Design Automation Conference

June 1983

700 pages

ISBN:0818600268

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS\DATC: IEEE Computer Society

Publisher

IEEE Press

Publication History

Published: 27 June 1983

Check for updates

Qualifiers

Article

Acceptance Rates

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

Upcoming Conference

DAC '25

Sponsor:
sigda

62nd ACM/IEEE Design Automation Conference

June 22 - 26, 2025

San Francisco , CA , USA

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

2
Total Citations
View Citations
192
Total Downloads

Downloads (Last 12 months)35
Downloads (Last 6 weeks)5

Reflects downloads up to 11 Feb 2025

Other Metrics

View Author Metrics

Citations

Cited By

Hudson JWisniewski JPeters RLambert POfek HO'Neill LPistilli PLosleben PNash JShaklee DPreas BLerman H(1984)Module positioning algorithms for rectilinear macrocell assembliesProceedings of the 21st Design Automation Conference10.5555/800033.800878(672-675)Online publication date: 25-Jun-1984
https://dl.acm.org/doi/10.5555/800033.800878
Ng CLambert POfek HO'Neill LPistilli PLosleben PNash JShaklee DPreas BLerman H(1984)A symbolic-interconnect router for custom IC designProceedings of the 21st Design Automation Conference10.5555/800033.800773(52-58)Online publication date: 25-Jun-1984
https://dl.acm.org/doi/10.5555/800033.800773

View Options

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

Figures

Tables

Media

View Table of Conten