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Achieved IPC Performance

Published: 05 May 1997 Publication History
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  • Abstract

    Extensibility can be based on cross-address-space interprocess communication (IPC) or on grafting application-specific modules into the operating system. For comparing both approaches, we need to explore the best achievable performance for both models. This paper reports the achieved performance of cross-address-space communication for the L4 microkernel on Intel Pentium, Mips R4600 and DEC Alpha processors. The direct costs range from 45 cycles (Alpha) to 121 cycles (Pentium). Since only 2.3% of the L1 cache are required (Pentium), the average indirect costs are not to be expected much higher.

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    cover image Guide Proceedings
    HOTOS '97: Proceedings of the 6th Workshop on Hot Topics in Operating Systems (HotOS-VI)
    May 1997
    ISBN:0818678348

    Publisher

    IEEE Computer Society

    United States

    Publication History

    Published: 05 May 1997

    Author Tags

    1. DEC Alpha
    2. Intel Pentium
    3. L1 cache
    4. L4 microkernel
    5. Mips R4600
    6. achieved IPC performance
    7. application-specific modules
    8. average indirect costs
    9. cross-address-space communication
    10. direct costs
    11. extensibility
    12. interprocess communication
    13. microprocessors
    14. operating system
    15. performance evaluation

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