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Comparing Functional and Structural Tests

Published: 03 October 2000 Publication History

Abstract

This paper describes an experimental study tounderstand issues and requirements forstructural-based testing using low cost testers,compared to functional-based testing using expensivetesters. Several studies have been directed at theeffectiveness of various test methods, but noneexplicitly addressed issues involved in attempting toreplace functional vectors with scan vectors and nonecarried the experiment further by placing defectivechips into systems and running system tests. This paperdescribes the results of such an experiment and offersinsight into necessary requirements for reduction orelimination of functional tests.

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S. DasGupta, R.G. Walther & T.W. Williams (1981) "An Enhancement to LSSD and Some Applications of LSSD in Reliability, Availability and Serviceability", Proc. FTCS-11, pp. 32-34.
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B.I. Dervisoglu and G.E. Stong (1991) "Design for Testability: Using Scanpath Techniques for Path-Delay Test and Measurement", Proc. Int. Test Cont., pp. 365-374.
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S.C. Ma, P. Franco and E.J. McCluskey (1995) "An Experimental Chip to Evaluate Test Techniques Experimental Results", Proc. Int. Test Conf., pp. 663-672.
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P. Nigh, W. Needham, K Butler, P. Maxwell, R.Aitken & W. Maly (1997) "So What IS an Optimal Test Mix? A Discussion of the SEMATECH Methods Experiment", Proc. Int. Test Conf., pp. 1037-1038.
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Published In

cover image Guide Proceedings
ITC '00: Proceedings of the 2000 IEEE International Test Conference
October 2000
ISBN:0780365461

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IEEE Computer Society

United States

Publication History

Published: 03 October 2000

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  • (2017)Link TestingJournal of Electronic Testing: Theory and Applications10.1007/s10836-017-5646-033:2(209-225)Online publication date: 1-Apr-2017
  • (2014)Non-intrusive integration of advanced diagnosis features in automotive E/E-architecturesProceedings of the conference on Design, Automation & Test in Europe10.5555/2616606.2617114(1-6)Online publication date: 24-Mar-2014
  • (2011)Deterministic test for the reproduction and detection of board-level functional failuresProceedings of the 16th Asia and South Pacific Design Automation Conference10.5555/1950815.1950916(491-496)Online publication date: 25-Jan-2011
  • (2010)Layout-aware pseudo-functional testing for critical paths considering power supply noise effectsProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1871271(1432-1437)Online publication date: 8-Mar-2010
  • (2010)On-Chip Delay Measurement Based Response Analysis for Timing CharacterizationJournal of Electronic Testing: Theory and Applications10.1007/s10836-010-5188-126:6(599-619)Online publication date: 1-Dec-2010
  • (2010)RTL DFT Techniques to Enhance Defect Coverage for Functional Test SequencesJournal of Electronic Testing: Theory and Applications10.1007/s10836-009-5135-126:2(151-164)Online publication date: 1-Apr-2010
  • (2009)On systematic illegal state identification for pseudo-functional testingProceedings of the 46th Annual Design Automation Conference10.1145/1629911.1630095(702-707)Online publication date: 26-Jul-2009
  • (2003)Wafer-Package Test Mix for Optimal Defect Detection and Test Time SavingsIEEE Design & Test10.1109/MDT.2003.123226020:5(84-89)Online publication date: 1-Sep-2003
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