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10.5555/846234.849348guideproceedingsArticle/Chapter ViewAbstractPublication PagesConference Proceedingsacm-pubtype
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Exploration of the Spatial Locality on Emerging Applications and the Consequences for Cache Performance

Published: 01 May 2000 Publication History

Abstract

The performance gap between processors and memory is increasing; making the cache hit rate paramount for performance. Studies show room for improvement, especially in data caches. The cache effectiveness is dictated by software locality; hence, the software behavior directs the cache performance.This paper presents a framework for studying spatial locality. It focus on the characteristics of the spatial locality in terms of closeness in time and space, to get the amount of accessed sequential data and the potential for cache hits. By using the framework, we gain knowledge for improving the cache performance.Our experiment consists of a program driven simulator and 11 important applications. We show a large performance potential in the data cache with up to 75% less miss rate, exploiting spatial locality. In order to investigate where potential bottlenecks are located we make a simple implementation of a scheme to exploit this spatial locality.

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  1. Exploration of the Spatial Locality on Emerging Applications and the Consequences for Cache Performance

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      cover image Guide Proceedings
      IPDPS '00: Proceedings of the 14th International Symposium on Parallel and Distributed Processing
      May 2000
      ISBN:0769505740

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      IEEE Computer Society

      United States

      Publication History

      Published: 01 May 2000

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      1. Spatial locality
      2. cache performance

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      • (2010)Where replacement algorithms failProceedings of the 7th ACM international conference on Computing frontiers10.1145/1787275.1787316(141-150)Online publication date: 17-May-2010
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      • (2004)Self-correcting LRU replacement policiesProceedings of the 1st conference on Computing frontiers10.1145/977091.977117(181-191)Online publication date: 14-Apr-2004
      • (2003)Layer Assignment echniques for Low Energy in Multi-Layered Memory OrganisationsProceedings of the conference on Design, Automation and Test in Europe - Volume 110.5555/789083.1022864Online publication date: 3-Mar-2003

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