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Path-sensitive, value-flow optimizations of programs (program analysis)
Publisher:
  • University of Pittsburgh
  • Computer Science 322 Alumni Hall Pittsburgh, PA
  • United States
ISBN:978-0-599-61095-8
Order Number:AAI9957708
Pages:
161
Reflects downloads up to 07 Mar 2025Bibliometrics
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Abstract

Current compiler optimizers are conservative and inflexible. As a result, even “highly optimized” programs execute half of their instructions redundantly, only to recompute previously computed values. Ideally, these values should be remembered and later reused , removing recomputations.

Unfortunately, this reuse strategy fails often. The culprit is intermittent reuse—one that exists only along some execution paths leading to the redundant instruction. This path-specific reuse is frequent, but to remove it, the optimizer may need to pay the exponential price of optimizing each path separately.

This thesis describes how to defeat this exponential path explosion, in its various forms: how to analyze paths separately only when it matters, via demand analysis; how to generate less path-specific code, via optimal profiling feedback; and how to avoid profiling individual paths, via adding confidence to imprecise profiles. The result is a path-sensitive optimization framework that is powerful enough to remove nearly all redundancies, yet practical enough to permit an industrial-strength implementation.

Cited By

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    Li L, Cifuentes C and Keynes N (2013). Precise and scalable context-sensitive pointer analysis via value flow graph, ACM SIGPLAN Notices, 48:11, (85-96), Online publication date: 4-Dec-2013.
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    Li L, Cifuentes C and Keynes N Precise and scalable context-sensitive pointer analysis via value flow graph Proceedings of the 2013 international symposium on memory management, (85-96)
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    Li L, Cifuentes C and Keynes N Precise and scalable context-sensitive pointer analysis via value flow graph Proceedings of the 2013 international symposium on memory management, (85-96)
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    Li L, Cifuentes C and Keynes N Boosting the performance of flow-sensitive points-to analysis using value flow Proceedings of the 19th ACM SIGSOFT symposium and the 13th European conference on Foundations of software engineering, (343-353)
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    Zhou H, Chen W and Chow F An SSA-based algorithm for optimal speculative code motion under an execution profile Proceedings of the 32nd ACM SIGPLAN Conference on Programming Language Design and Implementation, (98-108)
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    Zhou H, Chen W and Chow F (2011). An SSA-based algorithm for optimal speculative code motion under an execution profile, ACM SIGPLAN Notices, 46:6, (98-108), Online publication date: 4-Jun-2011.
  7. Xue J and Knoop J A fresh look at PRE as a maximum flow problem Proceedings of the 15th international conference on Compiler Construction, (139-154)
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    Scholz B, Horspool N and Knoop J (2019). Optimizing for space and time usage with speculative partial redundancy elimination, ACM SIGPLAN Notices, 39:7, (221-230), Online publication date: 11-Jul-2004.
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    Scholz B, Horspool N and Knoop J Optimizing for space and time usage with speculative partial redundancy elimination Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems, (221-230)
  10. ACM
    Bodík R, Gupta R and Soffa M (2004). Complete removal of redundant expressions, ACM SIGPLAN Notices, 39:4, (596-611), Online publication date: 1-Apr-2004.
  11. Melski D and Reps T The interprocedural express-lane transformation Proceedings of the 12th international conference on Compiler construction, (200-216)
  12. Cai Q and Xue J Optimal and efficient speculation-based partial redundancy elimination Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization, (91-102)
  13. ACM
    Bodík R, Gupta R and Soffa M (2019). Load-reuse analysis, ACM SIGPLAN Notices, 34:5, (64-76), Online publication date: 1-May-1999.
  14. ACM
    Bodík R, Gupta R and Soffa M Load-reuse analysis Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation, (64-76)
Contributors
  • DeepMind Technologies Limited
  • University of California, Riverside
  • University of Virginia

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