The counterflow pipeline processor architecture (CFPP) is a proposal for a family of microarchitectures for RISC processors. The architecture derives its name from its fundamental feature, namely that instructions and results flow in opposite directions within a pipeline and interact as they pass. The architecture seeks geometric regularity in processor chip layout, purely local control to avoid performance limitations of complex global pipeline stall signals, and simplicity that might lead to provably correct processor designs. Moreover, CFPP designs allow asynchronous implementations, in contrast to conventional pipeline designs where the synchronization required for operand forwarding makes asynchronous designs unattractive. This paper presents the CFPP architecture and a proposal for an asynchronous implementation. Detailed performance simulations of a complete processor design are not yet available.
Cited By
Cong J and Liu B A metric for layout-friendly microarchitecture optimization in high-level synthesis Proceedings of the 49th Annual Design Automation Conference, (1239-1244)- Ghosh S, Choi J, Ndai P and Roy K O2C Proceedings of the 2008 international symposium on Low Power Electronics & Design, (189-192)
- Ernst D, Kim N, Das S, Pant S, Rao R, Pham T, Ziesler C, Blaauw D, Austin T, Flautner K and Mudge T Razor Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
- Werner T and Akella V (2019). Asynchronous Processor Survey, Computer, 30:11, (67-76), Online publication date: 1-Nov-1997.
- Richardson W and Brunvand E Fred Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
- Arvind D and Rebello V Static Scheduling of Instructions on Micronet-based Asynchronous Processors Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
- Severson A and Nelson B (1995). Throughput in a counterflow pipeline processor, ACM SIGARCH Computer Architecture News, 23:1, (5-12), Online publication date: 1-Mar-1995.
Index Terms
- Counterflow Pipeline Processor Architecture
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