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Cache-coherent accelerators for persistent memory crash consistency

Published: 27 June 2022 Publication History

Abstract

Building persistent memory (PM) data structures is difficult because crashes interrupt operations, leaving data structures in an inconsistent state. Solving this requires augmenting code that modifies PM state to ensure that interrupted operations can be completed or undone. Today, this is done using careful, hand-crafted code, a compiler pass, or page faults. We propose a new, easy way to transform volatile data structure code to work with PM that uses a cache-coherent accelerator to do this augmentation, and we show that it may outperform existing approaches for building PM structures.

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Cited By

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  • (2024)UniMemProceedings of the 2024 USENIX Conference on Usenix Annual Technical Conference10.5555/3691992.3692021(463-477)Online publication date: 10-Jul-2024
  • (2024)F-Bypass: A Low-Power Network-on-Chip Design Utilizing Bypass to Improve Network ConnectivityACM Journal on Emerging Technologies in Computing Systems10.1145/369587420:4(1-26)Online publication date: 19-Sep-2024
  • (2024)Skip It: Take Control of Your Cache!Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 210.1145/3620665.3640407(1077-1094)Online publication date: 27-Apr-2024
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  1. Cache-coherent accelerators for persistent memory crash consistency

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    cover image ACM Conferences
    HotStorage '22: Proceedings of the 14th ACM Workshop on Hot Topics in Storage and File Systems
    June 2022
    141 pages
    ISBN:9781450393997
    DOI:10.1145/3538643
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 27 June 2022

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    Author Tags

    1. cache-coherent accelerators
    2. persistent memory

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    HotStorage '22 Paper Acceptance Rate 19 of 47 submissions, 40%;
    Overall Acceptance Rate 34 of 87 submissions, 39%

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    Cited By

    View all
    • (2024)UniMemProceedings of the 2024 USENIX Conference on Usenix Annual Technical Conference10.5555/3691992.3692021(463-477)Online publication date: 10-Jul-2024
    • (2024)F-Bypass: A Low-Power Network-on-Chip Design Utilizing Bypass to Improve Network ConnectivityACM Journal on Emerging Technologies in Computing Systems10.1145/369587420:4(1-26)Online publication date: 19-Sep-2024
    • (2024)Skip It: Take Control of Your Cache!Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 210.1145/3620665.3640407(1077-1094)Online publication date: 27-Apr-2024
    • (2024)SPP: Safe Persistent Pointers for Memory Safety2024 54th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)10.1109/DSN58291.2024.00019(37-52)Online publication date: 24-Jun-2024
    • (2023)Understanding Persistent-memory-related Issues in the Linux KernelACM Transactions on Storage10.1145/360594619:4(1-28)Online publication date: 3-Oct-2023
    • (2023)Localized Validation Accelerates Distributed Transactions on Disaggregated Persistent MemoryACM Transactions on Storage10.1145/358201219:3(1-35)Online publication date: 19-Jun-2023

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