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A unified framework for schedule and storage optimization

Published: 01 May 2001 Publication History

Abstract

We present a unified mathematical framework for analyzing the tradeoffs between parallelism and storage allocation within a parallelizing compiler. Using this framework, we show how to find a good storage mapping for a given schedule, a good schedule for a given storage mapping, and a good storage mapping that is valid for all legal schedules. We consider storage mappings that collapse one dimension of a multi-dimensional array, and programs that are in a single assignment form with a one-dimensional schedule. Our technique combines affine scheduling techniques with occupancy vector analysis and incorporates general affine dependences across statements and loop nests. We formulate the constraints imposed by the data dependences and storage mappings as a set of linear inequalities, and apply numerical programming techniques to efficiently solve for the shortest occupancy vector. We consider our method to be a first step towards automating a procedure that finds the optimal tradeoff between parallelism and storage space.

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Published In

cover image ACM SIGPLAN Notices
ACM SIGPLAN Notices  Volume 36, Issue 5
May 2001
330 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/381694
Issue’s Table of Contents
  • cover image ACM Conferences
    PLDI '01: Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
    June 2001
    331 pages
    ISBN:1581134142
    DOI:10.1145/378795
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 May 2001
Published in SIGPLAN Volume 36, Issue 5

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Cited By

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  • (2020)Optimizing the Linear Fascicle Evaluation Algorithm for Multi-core and Many-core SystemsACM Transactions on Parallel Computing10.1145/34180757:4(1-45)Online publication date: 25-Nov-2020
  • (2016)SMO: an integrated approach to intra-array and inter-array storage optimizationACM SIGPLAN Notices10.1145/2914770.283763651:1(526-538)Online publication date: 11-Jan-2016
  • (2016)Automatic Storage Optimization for ArraysACM Transactions on Programming Languages and Systems10.1145/284507838:3(1-23)Online publication date: 8-Apr-2016
  • (2013)AlphaZ: A System for Design Space Exploration in the Polyhedral ModelLanguages and Compilers for Parallel Computing10.1007/978-3-642-37658-0_2(17-31)Online publication date: 2013
  • (2011)SIRALINAJournal of Combinatorial Optimization10.1007/s10878-010-9332-822:4(819-844)Online publication date: 1-Nov-2011
  • (2009)Computations on Iteration SpacesThe Compiler Design Handbook10.1201/9781420043839.ch15(15-1-15-52)Online publication date: 7-Dec-2009
  • (2009)Periodic register saturation in innermost loopsParallel Computing10.1016/j.parco.2008.12.00135:4(239-254)Online publication date: 1-Apr-2009
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  • (2004)Early Periodic Register Allocation on ILP ProcessorsParallel Processing Letters10.1142/S012962640400188X14:02(287-313)Online publication date: Jun-2004
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