Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
skip to main content
research-article
Open access

Digitally Assisted Analog Integrated Circuits: Closing the gap between analog and digital

Published: 01 March 2004 Publication History

Abstract

In past decades, “Moore’s law”1 has governed the revolution in microelectronics. Through continuous advancements in device and fabrication technology, the industry has maintained exponential progress rates in transistor miniaturization and integration density. As a result, microchips have become cheaper, faster, more complex, and more power efficient.

References

[1]
1. Intel, Moore's Law, 2003; http://www.intel.com/ research/silicon/mooreslaw.htm.
[2]
2. Gray, P. R., et al. Analysis and Design of Analog Integrated Circuits, 4th edition. John Wiley & Sons, New York: NY, 2001.
[3]
3. Pelgrom, M. J. M., et al. Matching properties of MOS transistors. IEEE Journal of Solid-State Circuits 24, 5 (Oct. 1989), 1433-1439.
[4]
4. Lewis, S. H., et al. A 10-b 20-Msample/s analog-to-digital converter, IEEE Journal of Solid-State Circuits 27, 3 (Mar. 1992), 351-358.
[5]
5. Karanicolas, A. N., et al. A 15-b 1-Msample/s digitally self-calibrated pipeline ADC. IEEE Journal of Solid-State Circuits 28, 12 (Dec. 1993), 1207-1215.
[6]
6. Murmann, B., and Boser, B. E. A 12-bit 75-MS/s pipelined ADC using open-loop residue amplification. IEEE Journal Solid-State Circuits 38, 12, (Dec. 2003), 2040-2050.
[7]
7. Jamal, S. M., et al. A 10-b 120-Msample/s time-interleaved analog-to-digital converter with digital background calibration. IEEE Journal of Solid-State Circuits 37, 12 (Dec. 2002), 1618-1627.
[8]
8. Yu, P. C., et al. A 14 b 40 MSample/s pipelined ADC with DFCA. ISSCC Digest of Technical Papers (Feb. 2001), 136-137.
[9]
9. Elbornsson, J. Blind estimation and error correction in a CMOS ADC. Proceedings of the ASIC/SOC Conference (Sept. 2000), 124-128.
[10]
10. Blecker, E. B., et al. Digital background calibration of an algorithmic analog-to-digital converter using a simplified queue. IEEE Journal of Solid-State Circuits 38, 6 (June 2003), 1059-1062.
[11]
11. Galton, I. Digital cancellation of D/A converter noise in pipelined A/D converters. IEEE Transactions on Circuits and Systems II 47, 3 (Mar. 2000), 185-196.
[12]
12. Ming, J., and Lewis, S. H. An 8-bit 80-Msample/s pipelined analog-to-digital converter with background calibration, IEEE Journal of Solid-State Circuits 36, 10 (Oct. 2001) 1489-1497.
[13]
13. Li, J., and Moon, U.-K. Background calibration techniques for multistage pipelined ADCs with digital redundancy. IEEE Transactions on Circuits and Systems II 50, 9 (Sept. 2003), 531-538.
[14]
14. Yang, W., et al. A 3-V 340-mW 14-b 75-Msample/s CMOS ADC with 85-dB SFDR at Nyquist input. IEEE Journal of Solid-State Circuits 36, 12 (Dec. 2001) 1931-1936.
[15]
15. See reference 6.

Cited By

View all
  • (2015)Digitally assisted analog front-end power management strategy via dynamic reconfigurability for robust heart rate monitoringACM SIGBED Review10.1145/2815482.281548912:3(36-39)Online publication date: 17-Aug-2015
  • (2014)A modified switching scheme for multiplexer based thermometer-to-binary encoders2014 NORCHIP10.1109/NORCHIP.2014.7004733(1-4)Online publication date: Oct-2014
  • (2014)Circuit Reliability: Hot-Carrier Stress of MOS Transistors in Different Fields of ApplicationHot Carrier Degradation in Semiconductor Devices10.1007/978-3-319-08994-2_15(445-476)Online publication date: 4-Oct-2014
  • Show More Cited By

Index Terms

  1. Digitally Assisted Analog Integrated Circuits: Closing the gap between analog and digital

        Recommendations

        Comments

        Information & Contributors

        Information

        Published In

        cover image Queue
        Queue  Volume 2, Issue 1
        DSPs
        March 2004
        84 pages
        ISSN:1542-7730
        EISSN:1542-7749
        DOI:10.1145/984458
        Issue’s Table of Contents
        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

        Publisher

        Association for Computing Machinery

        New York, NY, United States

        Publication History

        Published: 01 March 2004
        Published in QUEUE Volume 2, Issue 1

        Permissions

        Request permissions for this article.

        Check for updates

        Qualifiers

        • Research-article
        • Popular
        • Editor picked

        Contributors

        Other Metrics

        Bibliometrics & Citations

        Bibliometrics

        Article Metrics

        • Downloads (Last 12 months)2,184
        • Downloads (Last 6 weeks)253
        Reflects downloads up to 06 Jan 2025

        Other Metrics

        Citations

        Cited By

        View all
        • (2015)Digitally assisted analog front-end power management strategy via dynamic reconfigurability for robust heart rate monitoringACM SIGBED Review10.1145/2815482.281548912:3(36-39)Online publication date: 17-Aug-2015
        • (2014)A modified switching scheme for multiplexer based thermometer-to-binary encoders2014 NORCHIP10.1109/NORCHIP.2014.7004733(1-4)Online publication date: Oct-2014
        • (2014)Circuit Reliability: Hot-Carrier Stress of MOS Transistors in Different Fields of ApplicationHot Carrier Degradation in Semiconductor Devices10.1007/978-3-319-08994-2_15(445-476)Online publication date: 4-Oct-2014
        • (2012)A 12.5-bit 4 MHz 13.8 mW MASH $\Delta \Sigma$ Modulator With Multirated VCO-Based ADCIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2012.220650659:8(1604-1613)Online publication date: Aug-2012
        • (2012)Ultra-Low Power VLSI Circuit Design Demystified and Explained: A TutorialIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2011.217700459:1(3-29)Online publication date: Jan-2012
        • (2010)A high speed current output stage with Digital assistant circuit2010 International Conference on Communications, Circuits and Systems (ICCCAS)10.1109/ICCCAS.2010.5581944(510-513)Online publication date: Jul-2010
        • (2009)Joint design-time and post-silicon optimization for digitally tuned analog circuitsProceedings of the 2009 International Conference on Computer-Aided Design10.1145/1687399.1687534(725-730)Online publication date: 2-Nov-2009
        • (2006)ANALOG-TO-DIGITAL CONVERSION TECHNOLOGIES FOR SOFTWARE DEFINED RADIOSRadio Design in Nanometer Technologies10.1007/978-1-4020-4824-1_6(101-121)Online publication date: 2006

        View Options

        View options

        PDF

        View or Download as a PDF file.

        PDF

        eReader

        View online with eReader.

        eReader

        Magazine Site

        View this article on the magazine site (external)

        Magazine Site

        Login options

        Full Access

        Media

        Figures

        Other

        Tables

        Share

        Share

        Share this Publication link

        Share on social media