Article

Hardware assisted pre-emptive control flow checking for embedded processors to improve reliability

Authors:

Roshan G. Ragel and

Sri ParameswaranAuthors Info & Claims

CODES+ISSS '06: Proceedings of the 4th international conference on Hardware/software codesign and system synthesis

October 2006

Pages 100 - 105

https://doi.org/10.1145/1176254.1176280

Published: 22 October 2006 Publication History

Abstract

Reliability in embedded processors can be improved by control flow checking and such checking can be conducted using software or hardware. Proposed software-only approaches suffer from significant code size penalties, resulting in poor performance. Proposed hardware-assisted approaches are not scalable and therefore cannot be implemented in real embedded systems. This paper presents a scalable, cost effective and novel fault detection technique, to ensure proper control flow of a program. This technique includes architectural changes to the processor and software modifications. While architectural refinement incorporates additional instructions, the software transformation utilizes these instructions into the program flow. Applications from an embedded systems benchmark suite are used for testing and evaluation. The overheads are compared with the state of the art approach that performs the same error coverage using software-only techniques. Our method has greatly reduced overheads compared to the state of the art. Our approach increased code size by between 3.85-11.2% and reduced performance by just 0.24-1.47% for eight different industry standard applications. The additional hardware (gates) overhead in this approach was just 3.59%. In contrast, the state of the art software-only approach required 50-150% additional code, and reduced performance by 53.5-99.5% when error detection was inserted.

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Cited By

Zhang ZPark SMahlke SXue JJung C(2020)Path Sensitive Signatures for Control Flow Error DetectionThe 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems10.1145/3372799.3394360(62-73)Online publication date: 16-Jun-2020
https://dl.acm.org/doi/10.1145/3372799.3394360
Rajabpour NSedaghat Y(2015)A hybrid-based error detection technique for PLC-based Industrial Control Systems2015 IEEE 20th Conference on Emerging Technologies & Factory Automation (ETFA)10.1109/ETFA.2015.7301525(1-7)Online publication date: Sep-2015
https://doi.org/10.1109/ETFA.2015.7301525
Wang HWang HJin Z(2015)Bipartite graph-based control flow checking for COTS-based small satellitesChinese Journal of Aeronautics10.1016/j.cja.2015.04.01028:3(883-893)Online publication date: Jun-2015
https://doi.org/10.1016/j.cja.2015.04.010
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Index Terms

Hardware assisted pre-emptive control flow checking for embedded processors to improve reliability
1. Hardware
  1. Hardware test
  2. Robustness

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Published In

cover image ACM Conferences

CODES+ISSS '06: Proceedings of the 4th international conference on Hardware/software codesign and system synthesis

October 2006

328 pages

ISBN:1595933700

DOI:10.1145/1176254

General Chair:
Reinaldo Bergamaschi
IBM T. J. Watson Research Center, USA
,
Program Chair:
Kiyoung Choi
Seoul National University, Korea

Copyright © 2006 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 22 October 2006

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ESWEEK06

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ESWEEK06: Second Embedded Systems Week 2006

October 22 - 25, 2006

Seoul, Korea

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Overall Acceptance Rate 280 of 864 submissions, 32%

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Cited By

Zhang ZPark SMahlke SXue JJung C(2020)Path Sensitive Signatures for Control Flow Error DetectionThe 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems10.1145/3372799.3394360(62-73)Online publication date: 16-Jun-2020
https://dl.acm.org/doi/10.1145/3372799.3394360
Rajabpour NSedaghat Y(2015)A hybrid-based error detection technique for PLC-based Industrial Control Systems2015 IEEE 20th Conference on Emerging Technologies & Factory Automation (ETFA)10.1109/ETFA.2015.7301525(1-7)Online publication date: Sep-2015
https://doi.org/10.1109/ETFA.2015.7301525
Wang HWang HJin Z(2015)Bipartite graph-based control flow checking for COTS-based small satellitesChinese Journal of Aeronautics10.1016/j.cja.2015.04.01028:3(883-893)Online publication date: Jun-2015
https://doi.org/10.1016/j.cja.2015.04.010
Rajabpour NSedaghat Y(2015)A Software-Based Error Detection Technique for Monitoring the Program Execution of RTUs in SCADAProceedings of the 34th International Conference on Computer Safety, Reliability, and Security - Volume 933710.1007/978-3-319-24255-2_33(457-470)Online publication date: 23-Sep-2015
https://dl.acm.org/doi/10.1007/978-3-319-24255-2_33
Christoforakis ITomoutzoglou OBakoyiannis DKornaros G(2014)Runtime Adaptation of Embedded Tasks with A-Priori Known Timing Behavior Utilizing On-Line Partner-Core Monitoring and RecoveryProceedings of the 2014 12th IEEE International Conference on Embedded and Ubiquitous Computing10.1109/EUC.2014.10(1-8)Online publication date: 26-Aug-2014
https://dl.acm.org/doi/10.1109/EUC.2014.10
Santos JFei Y(2013)Leveraging speculative architectures for runtime program validationACM Transactions on Embedded Computing Systems10.1145/251245613:1(1-18)Online publication date: 5-Sep-2013
https://dl.acm.org/doi/10.1145/2512456
Punt MTomasevic MDjordjevic J(2013)Evaluation and analysis of an on-line error detection monitoring techniqueComputers and Electrical Engineering10.1016/j.compeleceng.2012.11.01139:2(261-273)Online publication date: 1-Feb-2013
https://dl.acm.org/doi/10.1016/j.compeleceng.2012.11.011
Seepers RStrydis CGaydadjiev G(2012)Architecture-level fault-tolerance for biomedical implants2012 International Conference on Embedded Computer Systems (SAMOS)10.1109/SAMOS.2012.6404163(104-112)Online publication date: Jul-2012
https://doi.org/10.1109/SAMOS.2012.6404163
Abdur Rouf MKim S(2012)Low-cost control flow error protection by exploiting available redundancies in the pipeline17th Asia and South Pacific Design Automation Conference10.1109/ASPDAC.2012.6164941(175-180)Online publication date: Jan-2012
https://doi.org/10.1109/ASPDAC.2012.6164941
Patel KParameswaran SRagel R(2011)Architectural Frameworks for Security and Reliability of MPSoCsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2010.205385619:9(1641-1654)Online publication date: 1-Sep-2011
https://dl.acm.org/doi/10.1109/TVLSI.2010.2053856
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